1*286b96f4SSieu Mun Tang /* 2*286b96f4SSieu Mun Tang * Copyright (c) 2020-2022, Intel Corporation. All rights reserved. 3*286b96f4SSieu Mun Tang * 4*286b96f4SSieu Mun Tang * SPDX-License-Identifier: BSD-3-Clause 5*286b96f4SSieu Mun Tang */ 6*286b96f4SSieu Mun Tang 7*286b96f4SSieu Mun Tang #ifndef SOCFPGA_FCS_H 8*286b96f4SSieu Mun Tang #define SOCFPGA_FCS_H 9*286b96f4SSieu Mun Tang 10*286b96f4SSieu Mun Tang /* FCS Definitions */ 11*286b96f4SSieu Mun Tang 12*286b96f4SSieu Mun Tang #define FCS_RANDOM_WORD_SIZE 8U 13*286b96f4SSieu Mun Tang #define FCS_PROV_DATA_WORD_SIZE 44U 14*286b96f4SSieu Mun Tang 15*286b96f4SSieu Mun Tang #define FCS_RANDOM_BYTE_SIZE (FCS_RANDOM_WORD_SIZE * 4U) 16*286b96f4SSieu Mun Tang #define FCS_PROV_DATA_BYTE_SIZE (FCS_PROV_DATA_WORD_SIZE * 4U) 17*286b96f4SSieu Mun Tang 18*286b96f4SSieu Mun Tang #define FCS_CRYPTION_DATA_0 0x10100 19*286b96f4SSieu Mun Tang 20*286b96f4SSieu Mun Tang /* FCS Payload Structure */ 21*286b96f4SSieu Mun Tang 22*286b96f4SSieu Mun Tang typedef struct fcs_crypt_payload_t { 23*286b96f4SSieu Mun Tang uint32_t first_word; 24*286b96f4SSieu Mun Tang uint32_t src_addr; 25*286b96f4SSieu Mun Tang uint32_t src_size; 26*286b96f4SSieu Mun Tang uint32_t dst_addr; 27*286b96f4SSieu Mun Tang uint32_t dst_size; 28*286b96f4SSieu Mun Tang } fcs_crypt_payload; 29*286b96f4SSieu Mun Tang 30*286b96f4SSieu Mun Tang /* Functions Definitions */ 31*286b96f4SSieu Mun Tang 32*286b96f4SSieu Mun Tang uint32_t intel_fcs_random_number_gen(uint64_t addr, uint64_t *ret_size, 33*286b96f4SSieu Mun Tang uint32_t *mbox_error); 34*286b96f4SSieu Mun Tang uint32_t intel_fcs_send_cert(uint64_t addr, uint64_t size, 35*286b96f4SSieu Mun Tang uint32_t *send_id); 36*286b96f4SSieu Mun Tang uint32_t intel_fcs_get_provision_data(uint32_t *send_id); 37*286b96f4SSieu Mun Tang uint32_t intel_fcs_cryption(uint32_t mode, uint32_t src_addr, 38*286b96f4SSieu Mun Tang uint32_t src_size, uint32_t dst_addr, 39*286b96f4SSieu Mun Tang uint32_t dst_size, uint32_t *send_id); 40*286b96f4SSieu Mun Tang 41*286b96f4SSieu Mun Tang #endif /* SOCFPGA_FCS_H */ 42