1bf719f66SHadi Asyrafi /* 2bf719f66SHadi Asyrafi * Copyright (c) 2019, Intel Corporation. All rights reserved. 3bf719f66SHadi Asyrafi * 4bf719f66SHadi Asyrafi * SPDX-License-Identifier: BSD-3-Clause 5bf719f66SHadi Asyrafi */ 6bf719f66SHadi Asyrafi 7bf719f66SHadi Asyrafi #include <common/debug.h> 8bf719f66SHadi Asyrafi #include <lib/mmio.h> 9bf719f66SHadi Asyrafi #include <platform_def.h> 10bf719f66SHadi Asyrafi 11bf719f66SHadi Asyrafi #include "watchdog.h" 12bf719f66SHadi Asyrafi 13bf719f66SHadi Asyrafi 14bf719f66SHadi Asyrafi /* Reset watchdog timer */ 15bf719f66SHadi Asyrafi void watchdog_sw_rst(void) 16bf719f66SHadi Asyrafi { 17bf719f66SHadi Asyrafi mmio_write_32(WDT_CRR, WDT_SW_RST); 18bf719f66SHadi Asyrafi } 19bf719f66SHadi Asyrafi 20bf719f66SHadi Asyrafi /* Print component information */ 21bf719f66SHadi Asyrafi void watchdog_info(void) 22bf719f66SHadi Asyrafi { 23bf719f66SHadi Asyrafi INFO("Component Type : %x\r\n", mmio_read_32(WDT_COMP_VERSION)); 24bf719f66SHadi Asyrafi INFO("Component Version : %x\r\n", mmio_read_32(WDT_COMP_TYPE)); 25bf719f66SHadi Asyrafi } 26bf719f66SHadi Asyrafi 27bf719f66SHadi Asyrafi /* Check watchdog current status */ 28bf719f66SHadi Asyrafi void watchdog_status(void) 29bf719f66SHadi Asyrafi { 30bf719f66SHadi Asyrafi if (mmio_read_32(WDT_CR) & 1) { 31*19e36445SHadi Asyrafi INFO("Watchdog Timer is currently enabled\n"); 32bf719f66SHadi Asyrafi INFO("Current Counter : 0x%x\r\n", mmio_read_32(WDT_CCVR)); 33bf719f66SHadi Asyrafi } else { 34*19e36445SHadi Asyrafi INFO("Watchdog Timer is currently disabled\n"); 35bf719f66SHadi Asyrafi } 36bf719f66SHadi Asyrafi } 37bf719f66SHadi Asyrafi 38bf719f66SHadi Asyrafi /* Initialize & enable watchdog */ 39bf719f66SHadi Asyrafi void watchdog_init(int watchdog_clk) 40bf719f66SHadi Asyrafi { 41bf719f66SHadi Asyrafi uint8_t cycles_i = 0; 42bf719f66SHadi Asyrafi uint32_t wdt_cycles = WDT_MIN_CYCLES; 43bf719f66SHadi Asyrafi uint32_t top_init_cycles = WDT_PERIOD * watchdog_clk; 44bf719f66SHadi Asyrafi 45bf719f66SHadi Asyrafi while ((cycles_i < 15) && (wdt_cycles < top_init_cycles)) { 46bf719f66SHadi Asyrafi wdt_cycles = (wdt_cycles << 1); 47bf719f66SHadi Asyrafi cycles_i++; 48bf719f66SHadi Asyrafi } 49bf719f66SHadi Asyrafi 50bf719f66SHadi Asyrafi mmio_write_32(WDT_TORR, (cycles_i << 4) | cycles_i); 51bf719f66SHadi Asyrafi 52bf719f66SHadi Asyrafi mmio_write_32(WDT_CR, WDT_CR_RMOD|WDT_CR_EN); 53bf719f66SHadi Asyrafi } 54