xref: /rk3399_ARM-atf/plat/intel/soc/agilex5/include/agilex5_ddr.h (revision 522c175d2d03470de4073a4e5716851073d2bf22)
1 /*
2  * Copyright (c) 2024, Altera Corporation. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef AGILEX5_DDR_H
8 #define AGILEX5_DDR_H
9 
10 #include <stdint.h>
11 #include <stdio.h>
12 #include <string.h>
13 #include <lib/utils_def.h>
14 
15 #include "socfpga_handoff.h"
16 
17 #define CONFIG_NR_DRAM_BANKS	1
18 
19 typedef unsigned long long phys_addr_t;
20 typedef unsigned long long phys_size_t;
21 typedef phys_addr_t fdt_addr_t;
22 
23 /* DDR/RAM configuration */
24 struct ddr_info {
25 	phys_addr_t start;
26 	phys_size_t size;
27 };
28 
29 int agilex5_ddr_init(handoff *hoff_ptr);
30 
31 #endif /* AGILEX5_DDR_H */
32