1 /* 2 * Copyright 2025 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef IMX9_SYS_SLEEP_H 8 #define IMX9_SYS_SLEEP_H 9 10 #include <stdbool.h> 11 #include <stdint.h> 12 13 #include <lib/utils_def.h> 14 15 #include <platform_def.h> 16 17 #define GPIO_CTRL_REG_NUM U(8) 18 #define GPIO_PIN_MAX_NUM U(32) 19 #define GPIO_CTX(addr, num) \ 20 { .base = (addr), .pin_num = (num), } 21 22 struct gpio_ctx { 23 /* gpio base */ 24 uintptr_t base; 25 /* port control */ 26 uint32_t port_ctrl[GPIO_CTRL_REG_NUM]; 27 /* GPIO ICR, Max 32 */ 28 uint32_t pin_num; 29 uint32_t gpio_icr[GPIO_PIN_MAX_NUM]; 30 }; 31 32 #define WDOG_CTX(addr) \ 33 { .base = (addr), } 34 35 struct wdog_ctx { 36 /* wdog base */ 37 uintptr_t base; 38 uint32_t regs[2]; 39 }; 40 41 #define PER_HSK_CFG(idx, irq) \ 42 { .per_idx = (idx, wakeup_irq = (irq), } 43 44 struct per_hsk_cfg { 45 const uint32_t per_idx; 46 const uint32_t wakeup_irq; 47 }; 48 49 extern struct gpio_ctx gpios[GPIO_NUM]; 50 extern struct wdog_ctx wdogs[WDOG_NUM]; 51 extern struct per_hsk_cfg per_hsk_cfg[PER_NUM]; 52 extern uint32_t wakeup_irq_mask[IMR_NUM]; 53 extern bool keep_wakeupmix_on; 54 extern bool has_netc_irq; 55 56 void imx9_sys_sleep_prepare(uint32_t core_id); 57 void imx9_sys_sleep_unprepare(uint32_t core_id); 58 59 #endif /* IMX9_SYS_SLEEP_H */ 60