1# 2# Copyright (c) 2018-2023, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Translation tables library 8include lib/xlat_tables_v2/xlat_tables.mk 9 10PLAT_INCLUDES := -Iplat/imx/common/include \ 11 -Iplat/imx/imx8m/include \ 12 -Iplat/imx/imx8m/imx8mq/include 13 14# Include GICv3 driver files 15include drivers/arm/gic/v3/gicv3.mk 16 17IMX_DRAM_SOURCES := plat/imx/imx8m/ddr/dram.c \ 18 plat/imx/imx8m/ddr/clock.c \ 19 plat/imx/imx8m/ddr/dram_retention.c \ 20 plat/imx/imx8m/ddr/ddr4_dvfs.c \ 21 plat/imx/imx8m/ddr/lpddr4_dvfs.c 22 23IMX_GIC_SOURCES := ${GICV3_SOURCES} \ 24 plat/common/plat_gicv3.c \ 25 plat/common/plat_psci_common.c \ 26 plat/imx/common/plat_imx8_gic.c 27 28BL31_SOURCES += plat/imx/common/imx8_helpers.S \ 29 plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c \ 30 plat/imx/imx8m/imx8mq/imx8mq_psci.c \ 31 plat/imx/imx8m/gpc_common.c \ 32 plat/imx/imx8m/imx_aipstz.c \ 33 plat/imx/imx8m/imx8m_caam.c \ 34 plat/imx/imx8m/imx8m_psci_common.c \ 35 plat/imx/imx8m/imx8mq/gpc.c \ 36 plat/imx/common/imx8_topology.c \ 37 plat/imx/common/imx_sip_handler.c \ 38 plat/imx/common/imx_sip_svc.c \ 39 plat/imx/common/imx_uart_console.S \ 40 lib/cpus/aarch64/cortex_a53.S \ 41 drivers/arm/tzc/tzc380.c \ 42 drivers/delay_timer/delay_timer.c \ 43 drivers/delay_timer/generic_delay_timer.c \ 44 ${XLAT_TABLES_LIB_SRCS} \ 45 ${IMX_DRAM_SOURCES} \ 46 ${IMX_GIC_SOURCES} 47 48ENABLE_PIE := 1 49USE_COHERENT_MEM := 1 50RESET_TO_BL31 := 1 51A53_DISABLE_NON_TEMPORAL_HINT := 0 52WARMBOOT_ENABLE_DCACHE_EARLY := 1 53 54ERRATA_A53_835769 := 1 55ERRATA_A53_843419 := 1 56ERRATA_A53_855873 := 1 57 58ifneq (${PRELOADED_BL33_BASE},) 59$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE})) 60endif 61 62BL32_BASE ?= 0xfe000000 63$(eval $(call add_define,BL32_BASE)) 64 65BL32_SIZE ?= 0x2000000 66$(eval $(call add_define,BL32_SIZE)) 67 68IMX_BOOT_UART_BASE ?= 0x30860000 69$(eval $(call add_define,IMX_BOOT_UART_BASE)) 70 71ifeq (${SPD},trusty) 72 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 73endif 74