1*2502709fSJacky Bai /* 2*2502709fSJacky Bai * Copyright (c) 2019, NXP. All rights reserved. 3*2502709fSJacky Bai * 4*2502709fSJacky Bai * SPDX-License-Identifier: BSD-3-Clause 5*2502709fSJacky Bai */ 6*2502709fSJacky Bai 7*2502709fSJacky Bai #include <lib/mmio.h> 8*2502709fSJacky Bai 9*2502709fSJacky Bai #include <imx8m_caam.h> 10*2502709fSJacky Bai 11*2502709fSJacky Bai void imx8m_caam_init(void) 12*2502709fSJacky Bai { 13*2502709fSJacky Bai uint32_t sm_cmd; 14*2502709fSJacky Bai 15*2502709fSJacky Bai /* Dealloc part 0 and 2 with current DID */ 16*2502709fSJacky Bai sm_cmd = (0 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART); 17*2502709fSJacky Bai mmio_write_32(SM_CMD, sm_cmd); 18*2502709fSJacky Bai 19*2502709fSJacky Bai sm_cmd = (2 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART); 20*2502709fSJacky Bai mmio_write_32(SM_CMD, sm_cmd); 21*2502709fSJacky Bai 22*2502709fSJacky Bai /* config CAAM JRaMID set MID to Cortex A */ 23*2502709fSJacky Bai mmio_write_32(CAAM_JR0MID, CAAM_NS_MID); 24*2502709fSJacky Bai mmio_write_32(CAAM_JR1MID, CAAM_NS_MID); 25*2502709fSJacky Bai mmio_write_32(CAAM_JR2MID, CAAM_NS_MID); 26*2502709fSJacky Bai 27*2502709fSJacky Bai /* Alloc partition 0 writing SMPO and SMAGs */ 28*2502709fSJacky Bai mmio_write_32(SM_P0_PERM, 0xff); 29*2502709fSJacky Bai mmio_write_32(SM_P0_SMAG2, 0xffffffff); 30*2502709fSJacky Bai mmio_write_32(SM_P0_SMAG1, 0xffffffff); 31*2502709fSJacky Bai 32*2502709fSJacky Bai /* Allocate page 0 and 1 to partition 0 with DID set */ 33*2502709fSJacky Bai sm_cmd = (0 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT | 34*2502709fSJacky Bai SMC_CMD_ALLOC_PAGE); 35*2502709fSJacky Bai mmio_write_32(SM_CMD, sm_cmd); 36*2502709fSJacky Bai 37*2502709fSJacky Bai sm_cmd = (1 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT | 38*2502709fSJacky Bai SMC_CMD_ALLOC_PAGE); 39*2502709fSJacky Bai mmio_write_32(SM_CMD, sm_cmd); 40*2502709fSJacky Bai } 41