1# 2# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Architecture 8$(eval $(call add_define,ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING)) 9 10# Tune compiler for Cortex-A7 11ifeq ($(notdir $(CC)),armclang) 12 TF_CFLAGS += -mfpu=neon 13 ASFLAGS += -mfpu=neon 14else ifneq ($(findstring clang,$(notdir $(CC))),) 15 TF_CFLAGS += -mfpu=neon 16 ASFLAGS += -mfpu=neon 17else 18 TF_CFLAGS += -mfpu=neon 19 ASFLAGS += -mfpu=neon 20endif 21 22# Platform 23PLAT_INCLUDES := -Idrivers/imx/uart \ 24 -Iplat/imx/common/include/ \ 25 -Iplat/imx/imx7/warp7/include \ 26 -Idrivers/imx/timer \ 27 -Idrivers/imx/usdhc \ 28 -Iplat/imx/imx7/include 29 30# Translation tables library 31include lib/xlat_tables_v2/xlat_tables.mk 32 33BL2_SOURCES += common/desc_image_load.c \ 34 drivers/delay_timer/delay_timer.c \ 35 drivers/mmc/mmc.c \ 36 drivers/io/io_block.c \ 37 drivers/io/io_fip.c \ 38 drivers/io/io_memmap.c \ 39 drivers/io/io_storage.c \ 40 drivers/imx/timer/imx_gpt.c \ 41 drivers/imx/uart/imx_uart.c \ 42 drivers/imx/uart/imx_crash_uart.S \ 43 drivers/imx/usdhc/imx_usdhc.c \ 44 lib/aarch32/arm32_aeabi_divmod.c \ 45 lib/aarch32/arm32_aeabi_divmod_a32.S \ 46 lib/cpus/aarch32/cortex_a7.S \ 47 lib/optee/optee_utils.c \ 48 plat/imx/common/imx_aips.c \ 49 plat/imx/common/imx_caam.c \ 50 plat/imx/common/imx_clock.c \ 51 plat/imx/common/imx_csu.c \ 52 plat/imx/common/imx_io_mux.c \ 53 plat/imx/common/imx_snvs.c \ 54 plat/imx/common/imx_wdog.c \ 55 plat/imx/common/imx7_clock.c \ 56 plat/imx/imx7/warp7/aarch32/warp7_helpers.S \ 57 plat/imx/imx7/warp7/warp7_bl2_el3_setup.c \ 58 plat/imx/imx7/warp7/warp7_bl2_mem_params_desc.c \ 59 plat/imx/imx7/warp7/warp7_io_storage.c \ 60 plat/imx/imx7/warp7/warp7_image_load.c \ 61 plat/imx/common/aarch32/imx_uart_console.S \ 62 ${XLAT_TABLES_LIB_SRCS} 63 64ifneq (${TRUSTED_BOARD_BOOT},0) 65 66include drivers/auth/mbedtls/mbedtls_crypto.mk 67include drivers/auth/mbedtls/mbedtls_x509.mk 68 69AUTH_SOURCES := drivers/auth/auth_mod.c \ 70 drivers/auth/crypto_mod.c \ 71 drivers/auth/img_parser_mod.c \ 72 drivers/auth/tbbr/tbbr_cot.c 73 74BL2_SOURCES += ${AUTH_SOURCES} \ 75 plat/common/tbbr/plat_tbbr.c \ 76 plat/imx/imx7/warp7/warp7_trusted_boot.c \ 77 plat/imx/imx7/warp7/warp7_rotpk.S 78 79ROT_KEY = $(BUILD_PLAT)/rot_key.pem 80ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 81 82$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 83$(eval $(call MAKE_LIB_DIRS)) 84 85$(BUILD_PLAT)/bl2/warp7_rotpk.o: $(ROTPK_HASH) 86 87certificates: $(ROT_KEY) 88 89$(ROT_KEY): | $(BUILD_PLAT) 90 @echo " OPENSSL $@" 91 @if [ ! -f $(ROT_KEY) ]; then \ 92 openssl genrsa 2048 > $@ 2>/dev/null; \ 93 fi 94 95$(ROTPK_HASH): $(ROT_KEY) 96 @echo " OPENSSL $@" 97 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 98 openssl dgst -sha256 -binary > $@ 2>/dev/null 99endif 100 101# Build config flags 102# ------------------ 103 104WORKAROUND_CVE_2017_5715 := 0 105 106# Enable reset to BL31 by default 107RESET_TO_BL31 := 0 108 109# Non-TF Boot ROM 110BL2_AT_EL3 := 1 111 112# Indicate single-core 113COLD_BOOT_SINGLE_CPU := 1 114 115# Have different sections for code and rodata 116SEPARATE_CODE_AND_RODATA := 1 117 118# Use Coherent memory 119USE_COHERENT_MEM := 1 120 121# PLAT_WARP7_UART 122PLAT_WARP7_UART :=1 123$(eval $(call add_define,PLAT_WARP7_UART)) 124 125# Add the build options to pack BLx images and kernel device tree 126# in the FIP if the platform requires. 127ifneq ($(BL2),) 128$(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert)) 129endif 130ifneq ($(BL32_EXTRA1),) 131$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) 132endif 133ifneq ($(BL32_EXTRA2),) 134$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) 135endif 136ifneq ($(HW_CONFIG),) 137$(eval $(call TOOL_ADD_IMG,HW_CONFIG,--hw-config)) 138endif 139 140# Verify build config 141# ------------------- 142 143ifeq (${ARCH},aarch64) 144 $(error Error: AArch64 not supported on i.mx7) 145endif 146