1*936072edSJun Nie# 2*936072edSJun Nie# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3*936072edSJun Nie# 4*936072edSJun Nie# SPDX-License-Identifier: BSD-3-Clause 5*936072edSJun Nie# 6*936072edSJun Nie 7*936072edSJun Nie# Include imx7 common 8*936072edSJun Nieinclude plat/imx/imx7/common/imx7.mk 9*936072edSJun Nie 10*936072edSJun Nie# Platform 11*936072edSJun NiePLAT_INCLUDES += -Iplat/imx/imx7/picopi/include \ 12*936072edSJun Nie 13*936072edSJun NieBL2_SOURCES += drivers/imx/usdhc/imx_usdhc.c \ 14*936072edSJun Nie plat/imx/imx7/picopi/picopi_bl2_el3_setup.c \ 15*936072edSJun Nie 16*936072edSJun Nie# Build config flags 17*936072edSJun Nie# ------------------ 18*936072edSJun Nie 19*936072edSJun NieARM_CORTEX_A7 := yes 20*936072edSJun NieWORKAROUND_CVE_2017_5715 := 0 21*936072edSJun Nie 22*936072edSJun NieRESET_TO_BL31 := 0 23*936072edSJun Nie 24*936072edSJun Nie# Non-TF Boot ROM 25*936072edSJun NieBL2_AT_EL3 := 1 26*936072edSJun Nie 27*936072edSJun Nie# Indicate single-core 28*936072edSJun NieCOLD_BOOT_SINGLE_CPU := 1 29*936072edSJun Nie 30*936072edSJun Nie# Have different sections for code and rodata 31*936072edSJun NieSEPARATE_CODE_AND_RODATA := 1 32*936072edSJun Nie 33*936072edSJun Nie# Use Coherent memory 34*936072edSJun NieUSE_COHERENT_MEM := 1 35*936072edSJun Nie 36*936072edSJun Nie# Use multi console API 37*936072edSJun NieMULTI_CONSOLE_API := 1 38*936072edSJun Nie 39*936072edSJun NiePLAT_PICOPI_UART :=5 40*936072edSJun Nie$(eval $(call add_define,PLAT_PICOPI_UART)) 41