1936072edSJun Nie /*
2*99d37c8cSYann Gautier * Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
3936072edSJun Nie *
4936072edSJun Nie * SPDX-License-Identifier: BSD-3-Clause
5936072edSJun Nie */
6936072edSJun Nie
7936072edSJun Nie #include <assert.h>
8936072edSJun Nie
9936072edSJun Nie #include <platform_def.h>
10936072edSJun Nie
11936072edSJun Nie #include <common/debug.h>
12936072edSJun Nie #include <drivers/console.h>
13936072edSJun Nie #include <drivers/mmc.h>
14936072edSJun Nie #include <lib/utils.h>
15936072edSJun Nie
16936072edSJun Nie #include <imx_caam.h>
17936072edSJun Nie #include <imx_clock.h>
18936072edSJun Nie #include <imx_io_mux.h>
19936072edSJun Nie #include <imx_uart.h>
20936072edSJun Nie #include <imx_usdhc.h>
21936072edSJun Nie #include <imx7_def.h>
22936072edSJun Nie
23936072edSJun Nie #define UART5_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\
24936072edSJun Nie CCM_TRGT_MUX_UART5_CLK_ROOT_OSC_24M)
25936072edSJun Nie
26936072edSJun Nie #define USDHC_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\
27936072edSJun Nie CCM_TRGT_MUX_NAND_USDHC_BUS_CLK_ROOT_AHB |\
28936072edSJun Nie CCM_TARGET_POST_PODF(2))
29936072edSJun Nie
30936072edSJun Nie #define USB_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\
31936072edSJun Nie CCM_TRGT_MUX_USB_HSIC_CLK_ROOT_SYS_PLL)
32936072edSJun Nie
33936072edSJun Nie #define PICOPI_UART5_RX_MUX \
34936072edSJun Nie IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT1_UART5_RX_DATA
35936072edSJun Nie
36936072edSJun Nie #define PICOPI_UART5_TX_MUX \
37936072edSJun Nie IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT1_UART5_TX_DATA
38936072edSJun Nie
39936072edSJun Nie #define PICOPI_SD3_FEATURES \
40936072edSJun Nie (IOMUXC_SW_PAD_CTL_PAD_SD3_PU_47K | \
41936072edSJun Nie IOMUXC_SW_PAD_CTL_PAD_SD3_PE | \
42936072edSJun Nie IOMUXC_SW_PAD_CTL_PAD_SD3_HYS | \
43936072edSJun Nie IOMUXC_SW_PAD_CTL_PAD_SD3_SLEW_SLOW | \
44936072edSJun Nie IOMUXC_SW_PAD_CTL_PAD_SD3_DSE_3_X6)
45936072edSJun Nie
46*99d37c8cSYann Gautier static struct mmc_device_info mmc_info;
47*99d37c8cSYann Gautier
picopi_setup_pinmux(void)48936072edSJun Nie static void picopi_setup_pinmux(void)
49936072edSJun Nie {
50936072edSJun Nie /* Configure UART5 TX */
51936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_OFFSET,
52936072edSJun Nie PICOPI_UART5_TX_MUX);
53936072edSJun Nie /* Configure UART5 RX */
54936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_OFFSET,
55936072edSJun Nie PICOPI_UART5_RX_MUX);
56936072edSJun Nie
57936072edSJun Nie /* Configure USDHC3 */
58936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_CLK_OFFSET, 0);
59936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_CMD_OFFSET, 0);
60936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA0_OFFSET, 0);
61936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA1_OFFSET, 0);
62936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA2_OFFSET, 0);
63936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA3_OFFSET, 0);
64936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA4_OFFSET, 0);
65936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA5_OFFSET, 0);
66936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA6_OFFSET, 0);
67936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA7_OFFSET, 0);
68936072edSJun Nie imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO14_OFFSET,
69936072edSJun Nie IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO14_ALT1_SD3_CD_B);
70936072edSJun Nie
71936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_CLK_OFFSET,
72936072edSJun Nie PICOPI_SD3_FEATURES);
73936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_CMD_OFFSET,
74936072edSJun Nie PICOPI_SD3_FEATURES);
75936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA0_OFFSET,
76936072edSJun Nie PICOPI_SD3_FEATURES);
77936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA1_OFFSET,
78936072edSJun Nie PICOPI_SD3_FEATURES);
79936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA2_OFFSET,
80936072edSJun Nie PICOPI_SD3_FEATURES);
81936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA3_OFFSET,
82936072edSJun Nie PICOPI_SD3_FEATURES);
83936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA4_OFFSET,
84936072edSJun Nie PICOPI_SD3_FEATURES);
85936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA5_OFFSET,
86936072edSJun Nie PICOPI_SD3_FEATURES);
87936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA6_OFFSET,
88936072edSJun Nie PICOPI_SD3_FEATURES);
89936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA7_OFFSET,
90936072edSJun Nie PICOPI_SD3_FEATURES);
91936072edSJun Nie imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO14_OFFSET,
92936072edSJun Nie PICOPI_SD3_FEATURES);
93936072edSJun Nie }
94936072edSJun Nie
picopi_usdhc_setup(void)95936072edSJun Nie static void picopi_usdhc_setup(void)
96936072edSJun Nie {
97936072edSJun Nie imx_usdhc_params_t params;
98936072edSJun Nie
99936072edSJun Nie zeromem(¶ms, sizeof(imx_usdhc_params_t));
100936072edSJun Nie params.reg_base = PLAT_PICOPI_BOOT_MMC_BASE;
101936072edSJun Nie params.clk_rate = 25000000;
102936072edSJun Nie params.bus_width = MMC_BUS_WIDTH_8;
103*99d37c8cSYann Gautier mmc_info.mmc_dev_type = MMC_IS_EMMC;
104*99d37c8cSYann Gautier imx_usdhc_init(¶ms, &mmc_info);
105936072edSJun Nie }
106936072edSJun Nie
picopi_setup_usb_clocks(void)107936072edSJun Nie static void picopi_setup_usb_clocks(void)
108936072edSJun Nie {
109936072edSJun Nie uint32_t usb_en_bits = (uint32_t)USB_CLK_SELECT;
110936072edSJun Nie
111936072edSJun Nie imx_clock_set_usb_clk_root_bits(usb_en_bits);
112936072edSJun Nie imx_clock_enable_usb(CCM_CCGR_ID_USB_IPG);
113936072edSJun Nie imx_clock_enable_usb(CCM_CCGR_ID_USB_PHY_480MCLK);
114936072edSJun Nie imx_clock_enable_usb(CCM_CCGR_ID_USB_OTG1_PHY);
115936072edSJun Nie imx_clock_enable_usb(CCM_CCGR_ID_USB_OTG2_PHY);
116936072edSJun Nie }
117936072edSJun Nie
imx7_platform_setup(u_register_t arg1,u_register_t arg2,u_register_t arg3,u_register_t arg4)118936072edSJun Nie void imx7_platform_setup(u_register_t arg1, u_register_t arg2,
119936072edSJun Nie u_register_t arg3, u_register_t arg4)
120936072edSJun Nie {
121936072edSJun Nie uint32_t uart5_en_bits = (uint32_t)UART5_CLK_SELECT;
122936072edSJun Nie uint32_t usdhc_clock_sel = PLAT_PICOPI_SD - 1;
123936072edSJun Nie
124936072edSJun Nie /* Initialize clocks etc */
125936072edSJun Nie imx_clock_enable_uart(4, uart5_en_bits);
126936072edSJun Nie imx_clock_enable_usdhc(usdhc_clock_sel, USDHC_CLK_SELECT);
127936072edSJun Nie
128936072edSJun Nie picopi_setup_usb_clocks();
129936072edSJun Nie
130936072edSJun Nie /* Setup pin-muxes */
131936072edSJun Nie picopi_setup_pinmux();
132936072edSJun Nie
133936072edSJun Nie picopi_usdhc_setup();
134936072edSJun Nie }
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