127b9d5eaSAnson Huang/* 227b9d5eaSAnson Huang * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 327b9d5eaSAnson Huang * 427b9d5eaSAnson Huang * SPDX-License-Identifier: BSD-3-Clause 527b9d5eaSAnson Huang */ 627b9d5eaSAnson Huang 727b9d5eaSAnson Huang#include <arch.h> 827b9d5eaSAnson Huang#include <asm_macros.S> 9*cc5859caSSoby Mathew#define USE_FINISH_CONSOLE_REG_2 1027b9d5eaSAnson Huang#include <console_macros.S> 1127b9d5eaSAnson Huang#include <assert_macros.S> 1227b9d5eaSAnson Huang#include "imx8_lpuart.h" 1327b9d5eaSAnson Huang 1427b9d5eaSAnson Huang .globl console_lpuart_register 1527b9d5eaSAnson Huang .globl console_lpuart_init 1627b9d5eaSAnson Huang .globl console_lpuart_putc 1727b9d5eaSAnson Huang .globl console_lpuart_getc 1827b9d5eaSAnson Huang 1927b9d5eaSAnson Huangfunc console_lpuart_register 2027b9d5eaSAnson Huang mov x7, x30 2127b9d5eaSAnson Huang mov x6, x3 2227b9d5eaSAnson Huang cbz x6, register_fail 2327b9d5eaSAnson Huang str x0, [x6, #CONSOLE_T_DRVDATA] 2427b9d5eaSAnson Huang 2527b9d5eaSAnson Huang bl console_lpuart_init 2627b9d5eaSAnson Huang cbz x0, register_fail 2727b9d5eaSAnson Huang 2827b9d5eaSAnson Huang mov x0, x6 2927b9d5eaSAnson Huang mov x30, x7 30*cc5859caSSoby Mathew finish_console_register lpuart putc=1, getc=1 3127b9d5eaSAnson Huang 3227b9d5eaSAnson Huangregister_fail: 3327b9d5eaSAnson Huang ret x7 3427b9d5eaSAnson Huangendfunc console_lpuart_register 3527b9d5eaSAnson Huang 3627b9d5eaSAnson Huangfunc console_lpuart_init 3727b9d5eaSAnson Huang mov w0, #1 3827b9d5eaSAnson Huang ret 3927b9d5eaSAnson Huangendfunc console_lpuart_init 4027b9d5eaSAnson Huang 4127b9d5eaSAnson Huangfunc console_lpuart_putc 4227b9d5eaSAnson Huang ldr x1, [x1, #CONSOLE_T_DRVDATA] 4327b9d5eaSAnson Huang cbz x1, putc_error 4427b9d5eaSAnson Huang /* Prepare '\r' to '\n' */ 4527b9d5eaSAnson Huang cmp w0, #0xA 4627b9d5eaSAnson Huang b.ne 2f 4727b9d5eaSAnson Huang1: 4827b9d5eaSAnson Huang /* Check if the transmit FIFO is full */ 4927b9d5eaSAnson Huang ldr w2, [x1, #STAT] 5027b9d5eaSAnson Huang tbz w2, #23, 1b 5127b9d5eaSAnson Huang mov w2, #0xD 5227b9d5eaSAnson Huang str w2, [x1, #DATA] 5327b9d5eaSAnson Huang2: 5427b9d5eaSAnson Huang /* Check if the transmit FIFO is full */ 5527b9d5eaSAnson Huang ldr w2, [x1, #STAT] 5627b9d5eaSAnson Huang tbz w2, #23, 2b 5727b9d5eaSAnson Huang str w0, [x1, #DATA] 5827b9d5eaSAnson Huang ret 5927b9d5eaSAnson Huangputc_error: 6027b9d5eaSAnson Huang mov w0, #-1 6127b9d5eaSAnson Huang ret 6227b9d5eaSAnson Huangendfunc console_lpuart_putc 6327b9d5eaSAnson Huang 6427b9d5eaSAnson Huangfunc console_lpuart_getc 6527b9d5eaSAnson Huang ldr x0, [x0, #CONSOLE_T_DRVDATA] 6627b9d5eaSAnson Huang cbz x0, getc_error 6727b9d5eaSAnson Huang /* Check if the receive FIFO state */ 6827b9d5eaSAnson Huang ret 6927b9d5eaSAnson Huanggetc_error: 7027b9d5eaSAnson Huang mov w0, #-1 7127b9d5eaSAnson Huang ret 7227b9d5eaSAnson Huangendfunc console_lpuart_getc 73