1*27b9d5eaSAnson Huang/* 2*27b9d5eaSAnson Huang * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3*27b9d5eaSAnson Huang * 4*27b9d5eaSAnson Huang * SPDX-License-Identifier: BSD-3-Clause 5*27b9d5eaSAnson Huang */ 6*27b9d5eaSAnson Huang 7*27b9d5eaSAnson Huang#include <arch.h> 8*27b9d5eaSAnson Huang#include <asm_macros.S> 9*27b9d5eaSAnson Huang#include <console_macros.S> 10*27b9d5eaSAnson Huang#include <assert_macros.S> 11*27b9d5eaSAnson Huang#include "imx8_lpuart.h" 12*27b9d5eaSAnson Huang 13*27b9d5eaSAnson Huang .globl console_lpuart_register 14*27b9d5eaSAnson Huang .globl console_lpuart_init 15*27b9d5eaSAnson Huang .globl console_lpuart_putc 16*27b9d5eaSAnson Huang .globl console_lpuart_getc 17*27b9d5eaSAnson Huang 18*27b9d5eaSAnson Huangfunc console_lpuart_register 19*27b9d5eaSAnson Huang mov x7, x30 20*27b9d5eaSAnson Huang mov x6, x3 21*27b9d5eaSAnson Huang cbz x6, register_fail 22*27b9d5eaSAnson Huang str x0, [x6, #CONSOLE_T_DRVDATA] 23*27b9d5eaSAnson Huang 24*27b9d5eaSAnson Huang bl console_lpuart_init 25*27b9d5eaSAnson Huang cbz x0, register_fail 26*27b9d5eaSAnson Huang 27*27b9d5eaSAnson Huang mov x0, x6 28*27b9d5eaSAnson Huang mov x30, x7 29*27b9d5eaSAnson Huang finish_console_register lpuart 30*27b9d5eaSAnson Huang 31*27b9d5eaSAnson Huangregister_fail: 32*27b9d5eaSAnson Huang ret x7 33*27b9d5eaSAnson Huangendfunc console_lpuart_register 34*27b9d5eaSAnson Huang 35*27b9d5eaSAnson Huangfunc console_lpuart_init 36*27b9d5eaSAnson Huang mov w0, #1 37*27b9d5eaSAnson Huang ret 38*27b9d5eaSAnson Huangendfunc console_lpuart_init 39*27b9d5eaSAnson Huang 40*27b9d5eaSAnson Huangfunc console_lpuart_putc 41*27b9d5eaSAnson Huang ldr x1, [x1, #CONSOLE_T_DRVDATA] 42*27b9d5eaSAnson Huang cbz x1, putc_error 43*27b9d5eaSAnson Huang /* Prepare '\r' to '\n' */ 44*27b9d5eaSAnson Huang cmp w0, #0xA 45*27b9d5eaSAnson Huang b.ne 2f 46*27b9d5eaSAnson Huang1: 47*27b9d5eaSAnson Huang /* Check if the transmit FIFO is full */ 48*27b9d5eaSAnson Huang ldr w2, [x1, #STAT] 49*27b9d5eaSAnson Huang tbz w2, #23, 1b 50*27b9d5eaSAnson Huang mov w2, #0xD 51*27b9d5eaSAnson Huang str w2, [x1, #DATA] 52*27b9d5eaSAnson Huang2: 53*27b9d5eaSAnson Huang /* Check if the transmit FIFO is full */ 54*27b9d5eaSAnson Huang ldr w2, [x1, #STAT] 55*27b9d5eaSAnson Huang tbz w2, #23, 2b 56*27b9d5eaSAnson Huang str w0, [x1, #DATA] 57*27b9d5eaSAnson Huang ret 58*27b9d5eaSAnson Huangputc_error: 59*27b9d5eaSAnson Huang mov w0, #-1 60*27b9d5eaSAnson Huang ret 61*27b9d5eaSAnson Huangendfunc console_lpuart_putc 62*27b9d5eaSAnson Huang 63*27b9d5eaSAnson Huangfunc console_lpuart_getc 64*27b9d5eaSAnson Huang ldr x0, [x0, #CONSOLE_T_DRVDATA] 65*27b9d5eaSAnson Huang cbz x0, getc_error 66*27b9d5eaSAnson Huang /* Check if the receive FIFO state */ 67*27b9d5eaSAnson Huang ret 68*27b9d5eaSAnson Huanggetc_error: 69*27b9d5eaSAnson Huang mov w0, #-1 70*27b9d5eaSAnson Huang ret 71*27b9d5eaSAnson Huangendfunc console_lpuart_getc 72