1025514baSAnson Huang /* 2025514baSAnson Huang * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3025514baSAnson Huang * 4025514baSAnson Huang * SPDX-License-Identifier: BSD-3-Clause 5025514baSAnson Huang */ 6025514baSAnson Huang 7025514baSAnson Huang #ifndef __IMX_SIP_SVC_H__ 8025514baSAnson Huang #define __IMX_SIP_SVC_H__ 9025514baSAnson Huang 10025514baSAnson Huang /* SMC function IDs for SiP Service queries */ 11d3996c59SAnson Huang #define IMX_SIP_CPUFREQ 0xC2000001 12d3996c59SAnson Huang #define IMX_SIP_SET_CPUFREQ 0x00 13d3996c59SAnson Huang 14025514baSAnson Huang #define IMX_SIP_SRTC 0xC2000002 15025514baSAnson Huang #define IMX_SIP_SRTC_SET_TIME 0x00 16025514baSAnson Huang 17*ebdbc25bSAnson Huang #define IMX_SIP_WAKEUP_SRC 0xC2000009 18*ebdbc25bSAnson Huang #define IMX_SIP_WAKEUP_SRC_SCU 0x1 19*ebdbc25bSAnson Huang #define IMX_SIP_WAKEUP_SRC_IRQSTEER 0x2 20*ebdbc25bSAnson Huang 21025514baSAnson Huang #if (defined(PLAT_IMX8QM) || defined(PLAT_IMX8QX)) 22d3996c59SAnson Huang int imx_cpufreq_handler(uint32_t smc_fid, u_register_t x1, 23d3996c59SAnson Huang u_register_t x2, u_register_t x3); 24025514baSAnson Huang int imx_srtc_handler(uint32_t smc_fid, void *handle, u_register_t x1, 25025514baSAnson Huang u_register_t x2, u_register_t x3, u_register_t x4); 26*ebdbc25bSAnson Huang int imx_wakeup_src_handler(uint32_t smc_fid, u_register_t x1, 27*ebdbc25bSAnson Huang u_register_t x2, u_register_t x3); 28025514baSAnson Huang #endif 29025514baSAnson Huang 30025514baSAnson Huang #endif /* __IMX_SIP_SVC_H__ */ 31