1025514baSAnson Huang /* 2025514baSAnson Huang * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3025514baSAnson Huang * 4025514baSAnson Huang * SPDX-License-Identifier: BSD-3-Clause 5025514baSAnson Huang */ 6025514baSAnson Huang 7025514baSAnson Huang #ifndef __IMX_SIP_SVC_H__ 8025514baSAnson Huang #define __IMX_SIP_SVC_H__ 9025514baSAnson Huang 10025514baSAnson Huang /* SMC function IDs for SiP Service queries */ 11d3996c59SAnson Huang #define IMX_SIP_CPUFREQ 0xC2000001 12d3996c59SAnson Huang #define IMX_SIP_SET_CPUFREQ 0x00 13d3996c59SAnson Huang 14025514baSAnson Huang #define IMX_SIP_SRTC 0xC2000002 15025514baSAnson Huang #define IMX_SIP_SRTC_SET_TIME 0x00 16025514baSAnson Huang 17760f7941SAnson Huang #define IMX_SIP_BUILDINFO 0xC2000003 18760f7941SAnson Huang #define IMX_SIP_BUILDINFO_GET_COMMITHASH 0x00 19760f7941SAnson Huang 20ebdbc25bSAnson Huang #define IMX_SIP_WAKEUP_SRC 0xC2000009 21ebdbc25bSAnson Huang #define IMX_SIP_WAKEUP_SRC_SCU 0x1 22ebdbc25bSAnson Huang #define IMX_SIP_WAKEUP_SRC_IRQSTEER 0x2 23ebdbc25bSAnson Huang 24dbfa45e8SAnson Huang #define IMX_SIP_OTP_READ 0xC200000A 25dbfa45e8SAnson Huang #define IMX_SIP_OTP_WRITE 0xC200000B 26dbfa45e8SAnson Huang 27869eebc3SAnson Huang #define IMX_SIP_MISC_SET_TEMP 0xC200000C 28869eebc3SAnson Huang 29025514baSAnson Huang #if (defined(PLAT_IMX8QM) || defined(PLAT_IMX8QX)) 30d3996c59SAnson Huang int imx_cpufreq_handler(uint32_t smc_fid, u_register_t x1, 31d3996c59SAnson Huang u_register_t x2, u_register_t x3); 32025514baSAnson Huang int imx_srtc_handler(uint32_t smc_fid, void *handle, u_register_t x1, 33025514baSAnson Huang u_register_t x2, u_register_t x3, u_register_t x4); 34ebdbc25bSAnson Huang int imx_wakeup_src_handler(uint32_t smc_fid, u_register_t x1, 35ebdbc25bSAnson Huang u_register_t x2, u_register_t x3); 36dbfa45e8SAnson Huang int imx_otp_handler(uint32_t smc_fid, void *handle, 37dbfa45e8SAnson Huang u_register_t x1, u_register_t x2); 38869eebc3SAnson Huang int imx_misc_set_temp_handler(uint32_t smc_fid, u_register_t x1, 39869eebc3SAnson Huang u_register_t x2, u_register_t x3, 40869eebc3SAnson Huang u_register_t x4); 41*950d05f7SLeonard Crestez #endif 42760f7941SAnson Huang uint64_t imx_buildinfo_handler(uint32_t smc_fid, u_register_t x1, 43760f7941SAnson Huang u_register_t x2, u_register_t x3, 44760f7941SAnson Huang u_register_t x4); 45025514baSAnson Huang 46025514baSAnson Huang #endif /* __IMX_SIP_SVC_H__ */ 47