xref: /rk3399_ARM-atf/plat/imx/common/include/imx8_lpuart.h (revision 896d684de648b38b6d79f337c213606021f73bb0)
127b9d5eaSAnson Huang /*
227b9d5eaSAnson Huang  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
327b9d5eaSAnson Huang  *
427b9d5eaSAnson Huang  * SPDX-License-Identifier: BSD-3-Clause
527b9d5eaSAnson Huang  */
627b9d5eaSAnson Huang 
7c3cf06f1SAntonio Nino Diaz #ifndef IMX8_LPUART_H
8c3cf06f1SAntonio Nino Diaz #define IMX8_LPUART_H
927b9d5eaSAnson Huang 
1009d40e0eSAntonio Nino Diaz #include <drivers/console.h>
1127b9d5eaSAnson Huang 
1227b9d5eaSAnson Huang #define VERID	0x0
1327b9d5eaSAnson Huang #define PARAM	0x4
1427b9d5eaSAnson Huang #define GLOBAL	0x8
1527b9d5eaSAnson Huang #define PINCFG	0xC
1627b9d5eaSAnson Huang #define BAUD	0x10
1727b9d5eaSAnson Huang #define STAT	0x14
1827b9d5eaSAnson Huang #define CTRL	0x18
1927b9d5eaSAnson Huang #define DATA	0x1C
2027b9d5eaSAnson Huang #define MATCH	0x20
2127b9d5eaSAnson Huang #define MODIR	0x24
2227b9d5eaSAnson Huang #define FIFO	0x28
2327b9d5eaSAnson Huang #define WATER	0x2c
2427b9d5eaSAnson Huang 
2527b9d5eaSAnson Huang #define US1_TDRE	(1 << 23)
2627b9d5eaSAnson Huang #define US1_RDRF	(1 << 21)
2727b9d5eaSAnson Huang 
2827b9d5eaSAnson Huang #define CTRL_TE		(1 << 19)
2927b9d5eaSAnson Huang #define CTRL_RE		(1 << 18)
3027b9d5eaSAnson Huang 
3127b9d5eaSAnson Huang #define FIFO_TXFE	0x80
3227b9d5eaSAnson Huang #define FIFO_RXFE	0x40
3327b9d5eaSAnson Huang 
3427b9d5eaSAnson Huang #define WATER_TXWATER_OFF	1
3527b9d5eaSAnson Huang #define WATER_RXWATER_OFF	16
3627b9d5eaSAnson Huang 
3727b9d5eaSAnson Huang #define LPUART_CTRL_PT_MASK	0x1
3827b9d5eaSAnson Huang #define LPUART_CTRL_PE_MASK	0x2
3927b9d5eaSAnson Huang #define LPUART_CTRL_M_MASK	0x10
4027b9d5eaSAnson Huang 
4127b9d5eaSAnson Huang #define LPUART_BAUD_OSR_MASK                     (0x1F000000U)
4227b9d5eaSAnson Huang #define LPUART_BAUD_OSR_SHIFT                    (24U)
4327b9d5eaSAnson Huang #define LPUART_BAUD_OSR(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)
4427b9d5eaSAnson Huang 
4527b9d5eaSAnson Huang #define LPUART_BAUD_SBR_MASK                     (0x1FFFU)
4627b9d5eaSAnson Huang #define LPUART_BAUD_SBR_SHIFT                    (0U)
4727b9d5eaSAnson Huang #define LPUART_BAUD_SBR(x)                       (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)
4827b9d5eaSAnson Huang 
4927b9d5eaSAnson Huang #define LPUART_BAUD_SBNS_MASK                    (0x2000U)
5027b9d5eaSAnson Huang #define LPUART_BAUD_BOTHEDGE_MASK                (0x20000U)
5127b9d5eaSAnson Huang #define LPUART_BAUD_M10_MASK                     (0x20000000U)
5227b9d5eaSAnson Huang 
53d5dfdeb6SJulius Werner #ifndef __ASSEMBLER__
5427b9d5eaSAnson Huang 
5593c78ed2SAntonio Nino Diaz #include <stdint.h>
5627b9d5eaSAnson Huang 
5727b9d5eaSAnson Huang int console_lpuart_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
58*d7873bcdSAndre Przywara 			   console_t *console);
59d5dfdeb6SJulius Werner #endif /*__ASSEMBLER__*/
6027b9d5eaSAnson Huang 
61c3cf06f1SAntonio Nino Diaz #endif /* IMX8_LPUART_H */
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