1025514baSAnson Huang /* 2025514baSAnson Huang * Copyright 2019 NXP 3025514baSAnson Huang * 4025514baSAnson Huang * SPDX-License-Identifier: BSD-3-Clause 5025514baSAnson Huang */ 6025514baSAnson Huang 7025514baSAnson Huang #include <stdlib.h> 8025514baSAnson Huang #include <stdint.h> 9025514baSAnson Huang #include <std_svc.h> 10025514baSAnson Huang #include <platform_def.h> 11025514baSAnson Huang #include <common/debug.h> 12025514baSAnson Huang #include <common/runtime_svc.h> 13025514baSAnson Huang #include <imx_sip_svc.h> 14025514baSAnson Huang #include <sci/sci.h> 15025514baSAnson Huang 16*d3996c59SAnson Huang #ifdef PLAT_IMX8QM 17*d3996c59SAnson Huang const static int ap_cluster_index[PLATFORM_CLUSTER_COUNT] = { 18*d3996c59SAnson Huang SC_R_A53, SC_R_A72, 19*d3996c59SAnson Huang }; 20*d3996c59SAnson Huang #endif 21*d3996c59SAnson Huang 22025514baSAnson Huang static int imx_srtc_set_time(uint32_t year_mon, 23025514baSAnson Huang unsigned long day_hour, 24025514baSAnson Huang unsigned long min_sec) 25025514baSAnson Huang { 26025514baSAnson Huang return sc_timer_set_rtc_time(ipc_handle, 27025514baSAnson Huang year_mon >> 16, year_mon & 0xffff, 28025514baSAnson Huang day_hour >> 16, day_hour & 0xffff, 29025514baSAnson Huang min_sec >> 16, min_sec & 0xffff); 30025514baSAnson Huang } 31025514baSAnson Huang 32025514baSAnson Huang int imx_srtc_handler(uint32_t smc_fid, 33025514baSAnson Huang void *handle, 34025514baSAnson Huang u_register_t x1, 35025514baSAnson Huang u_register_t x2, 36025514baSAnson Huang u_register_t x3, 37025514baSAnson Huang u_register_t x4) 38025514baSAnson Huang { 39025514baSAnson Huang int ret; 40025514baSAnson Huang 41025514baSAnson Huang switch (x1) { 42025514baSAnson Huang case IMX_SIP_SRTC_SET_TIME: 43025514baSAnson Huang ret = imx_srtc_set_time(x2, x3, x4); 44025514baSAnson Huang break; 45025514baSAnson Huang default: 46025514baSAnson Huang ret = SMC_UNK; 47025514baSAnson Huang } 48025514baSAnson Huang 49025514baSAnson Huang SMC_RET1(handle, ret); 50025514baSAnson Huang } 51*d3996c59SAnson Huang 52*d3996c59SAnson Huang static void imx_cpufreq_set_target(uint32_t cluster_id, unsigned long freq) 53*d3996c59SAnson Huang { 54*d3996c59SAnson Huang sc_pm_clock_rate_t rate = (sc_pm_clock_rate_t)freq; 55*d3996c59SAnson Huang 56*d3996c59SAnson Huang #ifdef PLAT_IMX8QM 57*d3996c59SAnson Huang sc_pm_set_clock_rate(ipc_handle, ap_cluster_index[cluster_id], SC_PM_CLK_CPU, &rate); 58*d3996c59SAnson Huang #endif 59*d3996c59SAnson Huang #ifdef PLAT_IMX8QX 60*d3996c59SAnson Huang sc_pm_set_clock_rate(ipc_handle, SC_R_A35, SC_PM_CLK_CPU, &rate); 61*d3996c59SAnson Huang #endif 62*d3996c59SAnson Huang } 63*d3996c59SAnson Huang 64*d3996c59SAnson Huang int imx_cpufreq_handler(uint32_t smc_fid, 65*d3996c59SAnson Huang u_register_t x1, 66*d3996c59SAnson Huang u_register_t x2, 67*d3996c59SAnson Huang u_register_t x3) 68*d3996c59SAnson Huang { 69*d3996c59SAnson Huang switch (x1) { 70*d3996c59SAnson Huang case IMX_SIP_SET_CPUFREQ: 71*d3996c59SAnson Huang imx_cpufreq_set_target(x2, x3); 72*d3996c59SAnson Huang break; 73*d3996c59SAnson Huang default: 74*d3996c59SAnson Huang return SMC_UNK; 75*d3996c59SAnson Huang } 76*d3996c59SAnson Huang 77*d3996c59SAnson Huang return 0; 78*d3996c59SAnson Huang } 79