1*73f432a4SBryan O'Donoghue /* 2*73f432a4SBryan O'Donoghue * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*73f432a4SBryan O'Donoghue * 4*73f432a4SBryan O'Donoghue * SPDX-License-Identifier: BSD-3-Clause 5*73f432a4SBryan O'Donoghue */ 6*73f432a4SBryan O'Donoghue #include <imx_regs.h> 7*73f432a4SBryan O'Donoghue #include <imx_clock.h> 8*73f432a4SBryan O'Donoghue 9*73f432a4SBryan O'Donoghue static void imx7_clock_uart_init(void) 10*73f432a4SBryan O'Donoghue { 11*73f432a4SBryan O'Donoghue unsigned int i; 12*73f432a4SBryan O'Donoghue 13*73f432a4SBryan O'Donoghue for (i = 0; i < MXC_MAX_UART_NUM; i++) 14*73f432a4SBryan O'Donoghue imx_clock_disable_uart(i); 15*73f432a4SBryan O'Donoghue } 16*73f432a4SBryan O'Donoghue 17*73f432a4SBryan O'Donoghue void imx_clock_init(void) 18*73f432a4SBryan O'Donoghue { 19*73f432a4SBryan O'Donoghue /* 20*73f432a4SBryan O'Donoghue * The BootROM hands off to the next stage with the internal 24 MHz XTAL 21*73f432a4SBryan O'Donoghue * crystal already clocking the main PLL, which is very handy. 22*73f432a4SBryan O'Donoghue * Here we should enable whichever peripherals are required for ATF and 23*73f432a4SBryan O'Donoghue * OPTEE. 24*73f432a4SBryan O'Donoghue * 25*73f432a4SBryan O'Donoghue * Subsequent stages in the boot process such as u-boot and Linux 26*73f432a4SBryan O'Donoghue * already have a significant and mature code-base around clocks, so our 27*73f432a4SBryan O'Donoghue * objective should be to enable what we need for ATF/OPTEE without 28*73f432a4SBryan O'Donoghue * breaking any existing upstream code in Linux and u-boot. 29*73f432a4SBryan O'Donoghue */ 30*73f432a4SBryan O'Donoghue 31*73f432a4SBryan O'Donoghue /* Initialize UART clocks */ 32*73f432a4SBryan O'Donoghue imx7_clock_uart_init(); 33*73f432a4SBryan O'Donoghue } 34