xref: /rk3399_ARM-atf/plat/hisilicon/poplar/poplar_gicv2.c (revision 0818e9e864458660085259f8c67e9d5db6564ace)
1*0818e9e8SAntonio Nino Diaz /*
2*0818e9e8SAntonio Nino Diaz  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3*0818e9e8SAntonio Nino Diaz  *
4*0818e9e8SAntonio Nino Diaz  * SPDX-License-Identifier: BSD-3-Clause
5*0818e9e8SAntonio Nino Diaz  */
6*0818e9e8SAntonio Nino Diaz 
7*0818e9e8SAntonio Nino Diaz #include <gicv2.h>
8*0818e9e8SAntonio Nino Diaz #include <platform.h>
9*0818e9e8SAntonio Nino Diaz #include <platform_def.h>
10*0818e9e8SAntonio Nino Diaz 
11*0818e9e8SAntonio Nino Diaz /******************************************************************************
12*0818e9e8SAntonio Nino Diaz  * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
13*0818e9e8SAntonio Nino Diaz  * interrupts.
14*0818e9e8SAntonio Nino Diaz  *****************************************************************************/
15*0818e9e8SAntonio Nino Diaz static const interrupt_prop_t poplar_interrupt_props[] = {
16*0818e9e8SAntonio Nino Diaz 	POPLAR_G1S_IRQ_PROPS(GICV2_INTR_GROUP0),
17*0818e9e8SAntonio Nino Diaz 	POPLAR_G0_IRQ_PROPS(GICV2_INTR_GROUP0)
18*0818e9e8SAntonio Nino Diaz };
19*0818e9e8SAntonio Nino Diaz 
20*0818e9e8SAntonio Nino Diaz static unsigned int target_mask_array[PLATFORM_CORE_COUNT];
21*0818e9e8SAntonio Nino Diaz 
22*0818e9e8SAntonio Nino Diaz static const gicv2_driver_data_t poplar_gic_data = {
23*0818e9e8SAntonio Nino Diaz 	.gicd_base = POPLAR_GICD_BASE,
24*0818e9e8SAntonio Nino Diaz 	.gicc_base = POPLAR_GICC_BASE,
25*0818e9e8SAntonio Nino Diaz 	.interrupt_props = poplar_interrupt_props,
26*0818e9e8SAntonio Nino Diaz 	.interrupt_props_num = ARRAY_SIZE(poplar_interrupt_props),
27*0818e9e8SAntonio Nino Diaz 	.target_masks = target_mask_array,
28*0818e9e8SAntonio Nino Diaz 	.target_masks_num = ARRAY_SIZE(target_mask_array),
29*0818e9e8SAntonio Nino Diaz };
30*0818e9e8SAntonio Nino Diaz 
31*0818e9e8SAntonio Nino Diaz /******************************************************************************
32*0818e9e8SAntonio Nino Diaz  * Helper to initialize the GICv2 only driver.
33*0818e9e8SAntonio Nino Diaz  *****************************************************************************/
34*0818e9e8SAntonio Nino Diaz void poplar_gic_driver_init(void)
35*0818e9e8SAntonio Nino Diaz {
36*0818e9e8SAntonio Nino Diaz 	gicv2_driver_init(&poplar_gic_data);
37*0818e9e8SAntonio Nino Diaz }
38*0818e9e8SAntonio Nino Diaz 
39*0818e9e8SAntonio Nino Diaz void poplar_gic_init(void)
40*0818e9e8SAntonio Nino Diaz {
41*0818e9e8SAntonio Nino Diaz 	gicv2_distif_init();
42*0818e9e8SAntonio Nino Diaz 	gicv2_pcpu_distif_init();
43*0818e9e8SAntonio Nino Diaz 	gicv2_set_pe_target_mask(plat_my_core_pos());
44*0818e9e8SAntonio Nino Diaz 	gicv2_cpuif_enable();
45*0818e9e8SAntonio Nino Diaz }
46*0818e9e8SAntonio Nino Diaz 
47*0818e9e8SAntonio Nino Diaz /******************************************************************************
48*0818e9e8SAntonio Nino Diaz  * Helper to enable the GICv2 CPU interface
49*0818e9e8SAntonio Nino Diaz  *****************************************************************************/
50*0818e9e8SAntonio Nino Diaz void poplar_gic_cpuif_enable(void)
51*0818e9e8SAntonio Nino Diaz {
52*0818e9e8SAntonio Nino Diaz 	gicv2_cpuif_enable();
53*0818e9e8SAntonio Nino Diaz }
54*0818e9e8SAntonio Nino Diaz 
55*0818e9e8SAntonio Nino Diaz /******************************************************************************
56*0818e9e8SAntonio Nino Diaz  * Helper to initialize the per cpu distributor interface in GICv2
57*0818e9e8SAntonio Nino Diaz  *****************************************************************************/
58*0818e9e8SAntonio Nino Diaz void poplar_gic_pcpu_init(void)
59*0818e9e8SAntonio Nino Diaz {
60*0818e9e8SAntonio Nino Diaz 	gicv2_pcpu_distif_init();
61*0818e9e8SAntonio Nino Diaz 	gicv2_set_pe_target_mask(plat_my_core_pos());
62*0818e9e8SAntonio Nino Diaz }
63