1*e35d0edbSJorge Ramirez-Ortiz /* 2*e35d0edbSJorge Ramirez-Ortiz * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*e35d0edbSJorge Ramirez-Ortiz * 4*e35d0edbSJorge Ramirez-Ortiz * SPDX-License-Identifier: BSD-3-Clause 5*e35d0edbSJorge Ramirez-Ortiz */ 6*e35d0edbSJorge Ramirez-Ortiz 7*e35d0edbSJorge Ramirez-Ortiz #ifndef __POPLAR_LAYOUT_H 8*e35d0edbSJorge Ramirez-Ortiz #define __POPLAR_LAYOUT_H 9*e35d0edbSJorge Ramirez-Ortiz 10*e35d0edbSJorge Ramirez-Ortiz /* 11*e35d0edbSJorge Ramirez-Ortiz * Boot memory layout definitions for the HiSilicon Poplar board 12*e35d0edbSJorge Ramirez-Ortiz */ 13*e35d0edbSJorge Ramirez-Ortiz 14*e35d0edbSJorge Ramirez-Ortiz /* 15*e35d0edbSJorge Ramirez-Ortiz * When Poplar is powered on, boot ROM loads the initial content of 16*e35d0edbSJorge Ramirez-Ortiz * boot media into low memory, verifies it, and begins executing it 17*e35d0edbSJorge Ramirez-Ortiz * in 32-bit mode. The image loaded is "l-loader.bin", which contains 18*e35d0edbSJorge Ramirez-Ortiz * a small amount code along with an embedded ARM Trusted Firmware 19*e35d0edbSJorge Ramirez-Ortiz * BL1 image. The main purpose of "l-loader" is to prepare the 20*e35d0edbSJorge Ramirez-Ortiz * processor to execute the BL1 image in 64-bit mode, and to trigger 21*e35d0edbSJorge Ramirez-Ortiz * that execution. 22*e35d0edbSJorge Ramirez-Ortiz * 23*e35d0edbSJorge Ramirez-Ortiz * Also embedded in "l-loader.bin" is a FIP image that contains 24*e35d0edbSJorge Ramirez-Ortiz * other ARM Trusted Firmware images: BL2; BL31; and for BL33, 25*e35d0edbSJorge Ramirez-Ortiz * U-Boot. When BL1 executes, it unpacks the BL2 image from the FIP 26*e35d0edbSJorge Ramirez-Ortiz * image into a region of memory set aside to hold it. Similarly, 27*e35d0edbSJorge Ramirez-Ortiz * BL2 unpacks BL31 into memory reserved for it, and unpacks U-Boot 28*e35d0edbSJorge Ramirez-Ortiz * into high memory. 29*e35d0edbSJorge Ramirez-Ortiz * 30*e35d0edbSJorge Ramirez-Ortiz * Because the BL1 code is embedded in "l-loader", its base address 31*e35d0edbSJorge Ramirez-Ortiz * in memory is derived from the base address of the "l-loader" 32*e35d0edbSJorge Ramirez-Ortiz * text section, together with an offset. Memory space for BL2 is 33*e35d0edbSJorge Ramirez-Ortiz * reserved immediately following BL1, and memory space is reserved 34*e35d0edbSJorge Ramirez-Ortiz * for BL31 after that. ARM Trusted Firmware requires each of these 35*e35d0edbSJorge Ramirez-Ortiz * memory regions to be aligned on page boundaries, so the size of 36*e35d0edbSJorge Ramirez-Ortiz * each region is a multiple of a page size (ending in 000). Note 37*e35d0edbSJorge Ramirez-Ortiz * that ARM Trusted Firmware requires the read-only and read-write 38*e35d0edbSJorge Ramirez-Ortiz * regions of memory used for BL1 to be defined separately. 39*e35d0edbSJorge Ramirez-Ortiz * 40*e35d0edbSJorge Ramirez-Ortiz * --------------------- 41*e35d0edbSJorge Ramirez-Ortiz * | (unused memory) | 42*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ - - - - - 43*e35d0edbSJorge Ramirez-Ortiz * | (l-loader text) | \ 44*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ \ 45*e35d0edbSJorge Ramirez-Ortiz * | BL1 (read-only) | \ \ 46*e35d0edbSJorge Ramirez-Ortiz * |- - - - - - - - - -| | | 47*e35d0edbSJorge Ramirez-Ortiz * | BL1 (read-write) | | | 48*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ > BL Memory | 49*e35d0edbSJorge Ramirez-Ortiz * | Reserved for BL2 | | > "l-loader.bin" image 50*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ | | 51*e35d0edbSJorge Ramirez-Ortiz * | Reserved for BL31 | / | 52*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ | 53*e35d0edbSJorge Ramirez-Ortiz * . . . / 54*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ / 55*e35d0edbSJorge Ramirez-Ortiz * | FIP | / 56*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ - - - - - 57*e35d0edbSJorge Ramirez-Ortiz * . . . 58*e35d0edbSJorge Ramirez-Ortiz * | (unused memory) | 59*e35d0edbSJorge Ramirez-Ortiz * . . . 60*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ 61*e35d0edbSJorge Ramirez-Ortiz * |Reserved for U-Boot| 62*e35d0edbSJorge Ramirez-Ortiz * +-------------------+ 63*e35d0edbSJorge Ramirez-Ortiz * . . . 64*e35d0edbSJorge Ramirez-Ortiz * | (unused memory) | 65*e35d0edbSJorge Ramirez-Ortiz * --------------------- 66*e35d0edbSJorge Ramirez-Ortiz * 67*e35d0edbSJorge Ramirez-Ortiz * The size of each of these regions is defined below. The base 68*e35d0edbSJorge Ramirez-Ortiz * address of the "l-loader" TEXT section and the offset of the BL1 69*e35d0edbSJorge Ramirez-Ortiz * image within that serve as anchors for defining the positions of 70*e35d0edbSJorge Ramirez-Ortiz * all other regions. The FIP is placed in a section of its own. 71*e35d0edbSJorge Ramirez-Ortiz * 72*e35d0edbSJorge Ramirez-Ortiz * A "BASE" is the memory address of the start of a region; a "LIMIT" 73*e35d0edbSJorge Ramirez-Ortiz * marks its end. A "SIZE" is the size of a region (in bytes). An 74*e35d0edbSJorge Ramirez-Ortiz * "OFFSET" is an offset to the start of a region relative to the 75*e35d0edbSJorge Ramirez-Ortiz * base of the "l-loader" TEXT section (also a multiple of page size). 76*e35d0edbSJorge Ramirez-Ortiz */ 77*e35d0edbSJorge Ramirez-Ortiz #define LLOADER_TEXT_BASE 0x00001000 /* page aligned */ 78*e35d0edbSJorge Ramirez-Ortiz #define BL1_OFFSET 0x0000D000 /* page multiple */ 79*e35d0edbSJorge Ramirez-Ortiz #define FIP_BASE 0x00040000 80*e35d0edbSJorge Ramirez-Ortiz 81*e35d0edbSJorge Ramirez-Ortiz #define BL1_RO_SIZE 0x00008000 /* page multiple */ 82*e35d0edbSJorge Ramirez-Ortiz #define BL1_RW_SIZE 0x00008000 /* page multiple */ 83*e35d0edbSJorge Ramirez-Ortiz #define BL1_SIZE (BL1_RO_SIZE + BL1_RW_SIZE) 84*e35d0edbSJorge Ramirez-Ortiz #define BL2_SIZE 0x0000c000 /* page multiple */ 85*e35d0edbSJorge Ramirez-Ortiz #define BL31_SIZE 0x00014000 86*e35d0edbSJorge Ramirez-Ortiz #define FIP_SIZE 0x00068000 87*e35d0edbSJorge Ramirez-Ortiz 88*e35d0edbSJorge Ramirez-Ortiz /* BL1_OFFSET */ /* (Defined above) */ 89*e35d0edbSJorge Ramirez-Ortiz #define BL1_BASE (LLOADER_TEXT_BASE + BL1_OFFSET) 90*e35d0edbSJorge Ramirez-Ortiz #define BL1_LIMIT (BL1_BASE + BL1_SIZE) 91*e35d0edbSJorge Ramirez-Ortiz 92*e35d0edbSJorge Ramirez-Ortiz #define BL1_RO_OFFSET (BL1_OFFSET) 93*e35d0edbSJorge Ramirez-Ortiz #define BL1_RO_BASE (LLOADER_TEXT_BASE + BL1_RO_OFFSET) 94*e35d0edbSJorge Ramirez-Ortiz #define BL1_RO_LIMIT (BL1_RO_BASE + BL1_RO_SIZE) 95*e35d0edbSJorge Ramirez-Ortiz 96*e35d0edbSJorge Ramirez-Ortiz #define BL1_RW_OFFSET (BL1_RO_OFFSET + BL1_RO_SIZE) 97*e35d0edbSJorge Ramirez-Ortiz #define BL1_RW_BASE (LLOADER_TEXT_BASE + BL1_RW_OFFSET) 98*e35d0edbSJorge Ramirez-Ortiz #define BL1_RW_LIMIT (BL1_RW_BASE + BL1_RW_SIZE) 99*e35d0edbSJorge Ramirez-Ortiz 100*e35d0edbSJorge Ramirez-Ortiz #define BL2_OFFSET (BL1_OFFSET + BL1_SIZE) 101*e35d0edbSJorge Ramirez-Ortiz #define BL2_BASE (LLOADER_TEXT_BASE + BL2_OFFSET) 102*e35d0edbSJorge Ramirez-Ortiz #define BL2_LIMIT (BL2_BASE + BL2_SIZE) 103*e35d0edbSJorge Ramirez-Ortiz 104*e35d0edbSJorge Ramirez-Ortiz #define BL31_OFFSET (BL2_OFFSET + BL2_SIZE) 105*e35d0edbSJorge Ramirez-Ortiz #define BL31_BASE (LLOADER_TEXT_BASE + BL31_OFFSET) 106*e35d0edbSJorge Ramirez-Ortiz #define BL31_LIMIT (BL31_BASE + BL31_SIZE) 107*e35d0edbSJorge Ramirez-Ortiz 108*e35d0edbSJorge Ramirez-Ortiz #endif /* !__POPLAR_LAYOUT_H */ 109