1*e35d0edbSJorge Ramirez-Ortiz /* 2*e35d0edbSJorge Ramirez-Ortiz * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*e35d0edbSJorge Ramirez-Ortiz * 4*e35d0edbSJorge Ramirez-Ortiz * SPDX-License-Identifier: BSD-3-Clause 5*e35d0edbSJorge Ramirez-Ortiz */ 6*e35d0edbSJorge Ramirez-Ortiz 7*e35d0edbSJorge Ramirez-Ortiz #ifndef __PLAT_PRIVATE_H__ 8*e35d0edbSJorge Ramirez-Ortiz #define __PLAT_PRIVATE_H__ 9*e35d0edbSJorge Ramirez-Ortiz 10*e35d0edbSJorge Ramirez-Ortiz #include <bl_common.h> 11*e35d0edbSJorge Ramirez-Ortiz #include "hi3798cv200.h" 12*e35d0edbSJorge Ramirez-Ortiz 13*e35d0edbSJorge Ramirez-Ortiz void plat_configure_mmu_el3(unsigned long total_base, 14*e35d0edbSJorge Ramirez-Ortiz unsigned long total_size, 15*e35d0edbSJorge Ramirez-Ortiz unsigned long ro_start, 16*e35d0edbSJorge Ramirez-Ortiz unsigned long ro_limit, 17*e35d0edbSJorge Ramirez-Ortiz unsigned long coh_start, 18*e35d0edbSJorge Ramirez-Ortiz unsigned long coh_limit); 19*e35d0edbSJorge Ramirez-Ortiz 20*e35d0edbSJorge Ramirez-Ortiz void plat_configure_mmu_el1(unsigned long total_base, 21*e35d0edbSJorge Ramirez-Ortiz unsigned long total_size, 22*e35d0edbSJorge Ramirez-Ortiz unsigned long ro_start, 23*e35d0edbSJorge Ramirez-Ortiz unsigned long ro_limit, 24*e35d0edbSJorge Ramirez-Ortiz unsigned long coh_start, 25*e35d0edbSJorge Ramirez-Ortiz unsigned long coh_limit); 26*e35d0edbSJorge Ramirez-Ortiz 27*e35d0edbSJorge Ramirez-Ortiz void plat_delay_timer_init(void); 28*e35d0edbSJorge Ramirez-Ortiz void plat_io_setup(void); 29*e35d0edbSJorge Ramirez-Ortiz 30*e35d0edbSJorge Ramirez-Ortiz #endif /* __PLAT_PRIVATE_H__ */ 31