1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <stddef.h> 10 #include <string.h> 11 12 #include <platform_def.h> 13 14 #include <arch.h> 15 #include <arch_helpers.h> 16 #include <bl31/bl31.h> 17 #include <common/bl_common.h> 18 #include <common/debug.h> 19 #include <cortex_a53.h> 20 #include <drivers/arm/pl011.h> 21 #include <drivers/generic_delay_timer.h> 22 #include <lib/mmio.h> 23 #include <plat/common/platform.h> 24 25 #include "hi3798cv200.h" 26 #include "plat_private.h" 27 28 /* Memory ranges for code and RO data sections */ 29 #define BL31_RO_BASE (unsigned long)(&__RO_START__) 30 #define BL31_RO_LIMIT (unsigned long)(&__RO_END__) 31 32 /* Memory ranges for coherent memory section */ 33 #define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) 34 #define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) 35 36 #define TZPC_SEC_ATTR_CTRL_VALUE (0x9DB98D45) 37 38 static entry_point_info_t bl32_image_ep_info; 39 static entry_point_info_t bl33_image_ep_info; 40 static console_pl011_t console; 41 42 static void hisi_tzpc_sec_init(void) 43 { 44 mmio_write_32(HISI_TZPC_SEC_ATTR_CTRL, TZPC_SEC_ATTR_CTRL_VALUE); 45 } 46 47 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 48 { 49 entry_point_info_t *next_image_info; 50 51 assert(sec_state_is_valid(type)); 52 next_image_info = (type == NON_SECURE) 53 ? &bl33_image_ep_info : &bl32_image_ep_info; 54 /* 55 * None of the images on the ARM development platforms can have 0x0 56 * as the entrypoint 57 */ 58 if (next_image_info->pc) 59 return next_image_info; 60 else 61 return NULL; 62 } 63 64 /******************************************************************************* 65 * Perform any BL31 early platform setup common to ARM standard platforms. 66 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 67 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be 68 * done before the MMU is initialized so that the memory layout can be used 69 * while creating page tables. BL2 has flushed this information to memory, so 70 * we are guaranteed to pick up good data. 71 ******************************************************************************/ 72 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 73 u_register_t arg2, u_register_t arg3) 74 { 75 void *from_bl2; 76 77 from_bl2 = (void *) arg0; 78 79 console_pl011_register(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ, 80 PL011_BAUDRATE, &console); 81 82 /* Init console for crash report */ 83 plat_crash_console_init(); 84 85 /* 86 * Check params passed from BL2 should not be NULL, 87 */ 88 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; 89 90 assert(params_from_bl2 != NULL); 91 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 92 assert(params_from_bl2->h.version >= VERSION_2); 93 94 bl_params_node_t *bl_params = params_from_bl2->head; 95 96 /* 97 * Copy BL33 and BL32 (if present), entry point information. 98 * They are stored in Secure RAM, in BL2's address space. 99 */ 100 while (bl_params) { 101 if (bl_params->image_id == BL32_IMAGE_ID) 102 bl32_image_ep_info = *bl_params->ep_info; 103 104 if (bl_params->image_id == BL33_IMAGE_ID) 105 bl33_image_ep_info = *bl_params->ep_info; 106 107 bl_params = bl_params->next_params_info; 108 } 109 110 if (bl33_image_ep_info.pc == 0) 111 panic(); 112 } 113 114 void bl31_platform_setup(void) 115 { 116 /* Init arch timer */ 117 generic_delay_timer_init(); 118 119 /* Init GIC distributor and CPU interface */ 120 poplar_gic_driver_init(); 121 poplar_gic_init(); 122 123 /* Init security properties of IP blocks */ 124 hisi_tzpc_sec_init(); 125 } 126 127 void bl31_plat_runtime_setup(void) 128 { 129 /* do nothing */ 130 } 131 132 void bl31_plat_arch_setup(void) 133 { 134 plat_configure_mmu_el3(BL31_BASE, 135 (BL31_LIMIT - BL31_BASE), 136 BL31_RO_BASE, 137 BL31_RO_LIMIT, 138 BL31_COHERENT_RAM_BASE, 139 BL31_COHERENT_RAM_LIMIT); 140 141 INFO("Boot BL33 from 0x%lx for %lu Bytes\n", 142 bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2); 143 } 144