1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <assert.h> 9 #include <bl_common.h> 10 #include <console.h> 11 #include <debug.h> 12 #include <dw_mmc.h> 13 #include <emmc.h> 14 #include <errno.h> 15 #include <generic_delay_timer.h> 16 #include <mmio.h> 17 #include <pl061_gpio.h> 18 #include <platform.h> 19 #include <platform_def.h> 20 #include <string.h> 21 #include <tbbr_img_def.h> 22 #include "../../bl1/bl1_private.h" 23 #include "hi3798cv200.h" 24 #include "plat_private.h" 25 26 /* Symbols from link script for conherent section */ 27 extern unsigned long __COHERENT_RAM_START__; 28 extern unsigned long __COHERENT_RAM_END__; 29 30 #define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) 31 #define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) 32 33 /* Data structure which holds the extents of the trusted RAM for BL1 */ 34 static meminfo_t bl1_tzram_layout; 35 36 meminfo_t *bl1_plat_sec_mem_layout(void) 37 { 38 return &bl1_tzram_layout; 39 } 40 41 void bl1_early_platform_setup(void) 42 { 43 /* Initialize the console to provide early debug support */ 44 console_init(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ, PL011_BAUDRATE); 45 46 /* Allow BL1 to see the whole Trusted RAM */ 47 bl1_tzram_layout.total_base = BL_MEM_BASE; 48 bl1_tzram_layout.total_size = BL_MEM_SIZE; 49 50 /* Calculate how much RAM BL1 is using and how much remains free */ 51 bl1_tzram_layout.free_base = BL_MEM_BASE; 52 bl1_tzram_layout.free_size = BL_MEM_SIZE; 53 54 reserve_mem(&bl1_tzram_layout.free_base, 55 &bl1_tzram_layout.free_size, 56 BL1_RAM_BASE, 57 BL1_RAM_LIMIT - BL1_RAM_BASE); 58 59 INFO("BL1: 0x%lx - 0x%lx [size = %zu]\n", BL1_RAM_BASE, BL1_RAM_LIMIT, 60 BL1_RAM_LIMIT - BL1_RAM_BASE); 61 } 62 63 void bl1_plat_arch_setup(void) 64 { 65 plat_configure_mmu_el3(bl1_tzram_layout.total_base, 66 bl1_tzram_layout.total_size, 67 BL_MEM_BASE, /* l-loader and BL1 ROM */ 68 BL1_RO_LIMIT, 69 BL1_COHERENT_RAM_BASE, 70 BL1_COHERENT_RAM_LIMIT); 71 } 72 73 void bl1_platform_setup(void) 74 { 75 int i; 76 #if !POPLAR_RECOVERY 77 dw_mmc_params_t params = EMMC_INIT_PARAMS(POPLAR_EMMC_DESC_BASE); 78 #endif 79 80 generic_delay_timer_init(); 81 82 pl061_gpio_init(); 83 for (i = 0; i < GPIO_MAX; i++) 84 pl061_gpio_register(GPIO_BASE(i), i); 85 86 #if !POPLAR_RECOVERY 87 /* SoC-specific emmc register are initialized/configured by bootrom */ 88 INFO("BL1: initializing emmc\n"); 89 dw_mmc_init(¶ms); 90 #endif 91 92 plat_io_setup(); 93 } 94 95 unsigned int bl1_plat_get_next_image_id(void) 96 { 97 return BL2_IMAGE_ID; 98 } 99