1# 2# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Non-TF Boot ROM 8BL2_AT_EL3 := 1 9 10# On Hikey960, the TSP can execute from TZC secure area in DRAM. 11HIKEY960_TSP_RAM_LOCATION ?= dram 12ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram) 13 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID 14else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram) 15 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_SRAM_ID 16else 17 $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value") 18endif 19 20CRASH_CONSOLE_BASE := PL011_UART6_BASE 21COLD_BOOT_SINGLE_CPU := 1 22PLAT_PL061_MAX_GPIOS := 176 23PROGRAMMABLE_RESET_ADDRESS := 1 24ENABLE_SVE_FOR_NS := 0 25 26# Process flags 27$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID)) 28$(eval $(call add_define,CRASH_CONSOLE_BASE)) 29$(eval $(call add_define,PLAT_PL061_MAX_GPIOS)) 30 31# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 32# in the FIP if the platform requires. 33ifneq ($(BL32_EXTRA1),) 34$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 35endif 36ifneq ($(BL32_EXTRA2),) 37$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 38endif 39 40USE_COHERENT_MEM := 1 41 42PLAT_INCLUDES := -Iplat/hisilicon/hikey960/include 43 44PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \ 45 drivers/delay_timer/delay_timer.c \ 46 drivers/delay_timer/generic_delay_timer.c \ 47 lib/xlat_tables/aarch64/xlat_tables.c \ 48 lib/xlat_tables/xlat_tables_common.c \ 49 plat/hisilicon/hikey960/aarch64/hikey960_common.c \ 50 plat/hisilicon/hikey960/hikey960_boardid.c 51 52HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 53 drivers/arm/gic/v2/gicv2_main.c \ 54 drivers/arm/gic/v2/gicv2_helpers.c \ 55 plat/common/plat_gicv2.c 56 57BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 58 drivers/arm/pl061/pl061_gpio.c \ 59 drivers/gpio/gpio.c \ 60 drivers/io/io_block.c \ 61 drivers/io/io_fip.c \ 62 drivers/io/io_storage.c \ 63 drivers/synopsys/ufs/dw_ufs.c \ 64 drivers/ufs/ufs.c \ 65 lib/cpus/aarch64/cortex_a53.S \ 66 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 67 plat/hisilicon/hikey960/hikey960_bl1_setup.c \ 68 plat/hisilicon/hikey960/hikey960_bl_common.c \ 69 plat/hisilicon/hikey960/hikey960_io_storage.c \ 70 ${HIKEY960_GIC_SOURCES} 71 72BL2_SOURCES += common/desc_image_load.c \ 73 drivers/arm/pl061/pl061_gpio.c \ 74 drivers/gpio/gpio.c \ 75 drivers/io/io_block.c \ 76 drivers/io/io_fip.c \ 77 drivers/io/io_storage.c \ 78 drivers/synopsys/ufs/dw_ufs.c \ 79 drivers/ufs/ufs.c \ 80 lib/cpus/aarch64/cortex_a53.S \ 81 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 82 plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \ 83 plat/hisilicon/hikey960/hikey960_bl2_setup.c \ 84 plat/hisilicon/hikey960/hikey960_bl_common.c \ 85 plat/hisilicon/hikey960/hikey960_image_load.c \ 86 plat/hisilicon/hikey960/hikey960_io_storage.c \ 87 plat/hisilicon/hikey960/hikey960_mcu_load.c 88 89ifeq (${SPD},opteed) 90BL2_SOURCES += lib/optee/optee_utils.c 91endif 92 93BL31_SOURCES += drivers/arm/cci/cci.c \ 94 lib/cpus/aarch64/cortex_a53.S \ 95 lib/cpus/aarch64/cortex_a72.S \ 96 lib/cpus/aarch64/cortex_a73.S \ 97 plat/common/plat_psci_common.c \ 98 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 99 plat/hisilicon/hikey960/hikey960_bl31_setup.c \ 100 plat/hisilicon/hikey960/hikey960_pm.c \ 101 plat/hisilicon/hikey960/hikey960_topology.c \ 102 plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \ 103 plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \ 104 ${HIKEY960_GIC_SOURCES} 105 106ifneq (${TRUSTED_BOARD_BOOT},0) 107 108include drivers/auth/mbedtls/mbedtls_crypto.mk 109include drivers/auth/mbedtls/mbedtls_x509.mk 110 111AUTH_SOURCES := drivers/auth/auth_mod.c \ 112 drivers/auth/crypto_mod.c \ 113 drivers/auth/img_parser_mod.c \ 114 drivers/auth/tbbr/tbbr_cot.c 115 116BL1_SOURCES += ${AUTH_SOURCES} \ 117 plat/common/tbbr/plat_tbbr.c \ 118 plat/hisilicon/hikey960/hikey960_tbbr.c \ 119 plat/hisilicon/hikey960/hikey960_rotpk.S 120 121BL2_SOURCES += ${AUTH_SOURCES} \ 122 plat/common/tbbr/plat_tbbr.c \ 123 plat/hisilicon/hikey960/hikey960_tbbr.c \ 124 plat/hisilicon/hikey960/hikey960_rotpk.S 125 126ROT_KEY = $(BUILD_PLAT)/rot_key.pem 127ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 128 129$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 130$(BUILD_PLAT)/bl1/hikey960_rotpk.o: $(ROTPK_HASH) 131$(BUILD_PLAT)/bl2/hikey960_rotpk.o: $(ROTPK_HASH) 132 133certificates: $(ROT_KEY) 134$(ROT_KEY): | $(BUILD_PLAT) 135 @echo " OPENSSL $@" 136 $(Q)openssl genrsa 2048 > $@ 2>/dev/null 137 138$(ROTPK_HASH): $(ROT_KEY) 139 @echo " OPENSSL $@" 140 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 141 openssl dgst -sha256 -binary > $@ 2>/dev/null 142endif 143 144# Enable workarounds for selected Cortex-A53 errata. 145ERRATA_A53_836870 := 1 146ERRATA_A53_843419 := 1 147ERRATA_A53_855873 := 1 148 149FIP_ALIGN := 512 150