1# 2# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7CRASH_CONSOLE_BASE := PL011_UART6_BASE 8COLD_BOOT_SINGLE_CPU := 1 9PROGRAMMABLE_RESET_ADDRESS := 1 10 11# Process flags 12$(eval $(call add_define,CRASH_CONSOLE_BASE)) 13 14ENABLE_PLAT_COMPAT := 0 15 16USE_COHERENT_MEM := 1 17 18PLAT_INCLUDES := -Iinclude/common/tbbr \ 19 -Iplat/hisilicon/hikey960/include 20 21PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ 22 drivers/delay_timer/delay_timer.c \ 23 drivers/delay_timer/generic_delay_timer.c \ 24 lib/aarch64/xlat_tables.c \ 25 plat/hisilicon/hikey960/aarch64/hikey960_common.c \ 26 plat/hisilicon/hikey960/hikey960_boardid.c 27 28HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 29 drivers/arm/gic/v2/gicv2_main.c \ 30 drivers/arm/gic/v2/gicv2_helpers.c \ 31 plat/common/plat_gicv2.c 32 33BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 34 drivers/io/io_block.c \ 35 drivers/io/io_fip.c \ 36 drivers/io/io_storage.c \ 37 drivers/synopsys/ufs/dw_ufs.c \ 38 drivers/ufs/ufs.c \ 39 lib/cpus/aarch64/cortex_a53.S \ 40 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 41 plat/hisilicon/hikey960/hikey960_bl1_setup.c \ 42 plat/hisilicon/hikey960/hikey960_io_storage.c \ 43 ${HIKEY960_GIC_SOURCES} 44 45BL2_SOURCES += drivers/io/io_block.c \ 46 drivers/io/io_fip.c \ 47 drivers/io/io_storage.c \ 48 drivers/ufs/ufs.c \ 49 plat/hisilicon/hikey960/hikey960_bl2_setup.c \ 50 plat/hisilicon/hikey960/hikey960_io_storage.c \ 51 plat/hisilicon/hikey960/hikey960_mcu_load.c 52 53BL31_SOURCES += drivers/arm/cci/cci.c \ 54 lib/cpus/aarch64/cortex_a53.S \ 55 lib/cpus/aarch64/cortex_a72.S \ 56 lib/cpus/aarch64/cortex_a73.S \ 57 plat/common/aarch64/plat_psci_common.c \ 58 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 59 plat/hisilicon/hikey960/hikey960_bl31_setup.c \ 60 plat/hisilicon/hikey960/hikey960_pm.c \ 61 plat/hisilicon/hikey960/hikey960_topology.c \ 62 plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \ 63 plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \ 64 ${HIKEY960_GIC_SOURCES} 65 66# Enable workarounds for selected Cortex-A53 errata. 67ERRATA_A53_836870 := 1 68ERRATA_A53_843419 := 1 69ERRATA_A53_855873 := 1 70