1# 2# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Enable version2 of image loading 8LOAD_IMAGE_V2 := 1 9 10# On Hikey960, the TSP can execute from TZC secure area in DRAM. 11HIKEY960_TSP_RAM_LOCATION ?= dram 12ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram) 13 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID 14else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram) 15 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_SRAM_ID 16else 17 $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value") 18endif 19 20CRASH_CONSOLE_BASE := PL011_UART6_BASE 21COLD_BOOT_SINGLE_CPU := 1 22PROGRAMMABLE_RESET_ADDRESS := 1 23ENABLE_SVE_FOR_NS := 0 24 25# Process flags 26$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID)) 27$(eval $(call add_define,CRASH_CONSOLE_BASE)) 28 29# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 30# in the FIP if the platform requires. 31ifneq ($(BL32_EXTRA1),) 32$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 33endif 34ifneq ($(BL32_EXTRA2),) 35$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 36endif 37 38ENABLE_PLAT_COMPAT := 0 39 40USE_COHERENT_MEM := 1 41 42PLAT_INCLUDES := -Iinclude/common/tbbr \ 43 -Iplat/hisilicon/hikey960/include 44 45PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ 46 drivers/delay_timer/delay_timer.c \ 47 drivers/delay_timer/generic_delay_timer.c \ 48 lib/aarch64/xlat_tables.c \ 49 plat/hisilicon/hikey960/aarch64/hikey960_common.c \ 50 plat/hisilicon/hikey960/hikey960_boardid.c 51 52HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 53 drivers/arm/gic/v2/gicv2_main.c \ 54 drivers/arm/gic/v2/gicv2_helpers.c \ 55 plat/common/plat_gicv2.c 56 57BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 58 drivers/io/io_block.c \ 59 drivers/io/io_fip.c \ 60 drivers/io/io_storage.c \ 61 drivers/synopsys/ufs/dw_ufs.c \ 62 drivers/ufs/ufs.c \ 63 lib/cpus/aarch64/cortex_a53.S \ 64 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 65 plat/hisilicon/hikey960/hikey960_bl1_setup.c \ 66 plat/hisilicon/hikey960/hikey960_io_storage.c \ 67 ${HIKEY960_GIC_SOURCES} 68 69BL2_SOURCES += drivers/io/io_block.c \ 70 drivers/io/io_fip.c \ 71 drivers/io/io_storage.c \ 72 drivers/ufs/ufs.c \ 73 plat/hisilicon/hikey960/hikey960_bl2_setup.c \ 74 plat/hisilicon/hikey960/hikey960_io_storage.c \ 75 plat/hisilicon/hikey960/hikey960_mcu_load.c 76 77ifeq (${LOAD_IMAGE_V2},1) 78BL2_SOURCES += plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \ 79 plat/hisilicon/hikey960/hikey960_image_load.c \ 80 common/desc_image_load.c 81 82ifeq (${SPD},opteed) 83BL2_SOURCES += lib/optee/optee_utils.c 84endif 85endif 86 87BL31_SOURCES += drivers/arm/cci/cci.c \ 88 lib/cpus/aarch64/cortex_a53.S \ 89 lib/cpus/aarch64/cortex_a72.S \ 90 lib/cpus/aarch64/cortex_a73.S \ 91 plat/common/aarch64/plat_psci_common.c \ 92 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 93 plat/hisilicon/hikey960/hikey960_bl31_setup.c \ 94 plat/hisilicon/hikey960/hikey960_pm.c \ 95 plat/hisilicon/hikey960/hikey960_topology.c \ 96 plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \ 97 plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \ 98 ${HIKEY960_GIC_SOURCES} 99 100# Enable workarounds for selected Cortex-A53 errata. 101ERRATA_A53_836870 := 1 102ERRATA_A53_843419 := 1 103ERRATA_A53_855873 := 1 104 105FIP_ALIGN := 512 106