1# 2# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Enable version2 of image loading 8LOAD_IMAGE_V2 := 1 9 10# On Hikey960, the TSP can execute from TZC secure area in DRAM. 11HIKEY960_TSP_RAM_LOCATION := dram 12ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram) 13 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID 14else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram) 15 HIKEY960_TSP_RAM_LOCATION_ID := HIKEY960_SRAM_ID 16else 17 $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value") 18endif 19 20CRASH_CONSOLE_BASE := PL011_UART6_BASE 21COLD_BOOT_SINGLE_CPU := 1 22PROGRAMMABLE_RESET_ADDRESS := 1 23 24# Process flags 25$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID)) 26$(eval $(call add_define,CRASH_CONSOLE_BASE)) 27 28ENABLE_PLAT_COMPAT := 0 29 30USE_COHERENT_MEM := 1 31 32PLAT_INCLUDES := -Iinclude/common/tbbr \ 33 -Iplat/hisilicon/hikey960/include 34 35PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ 36 drivers/delay_timer/delay_timer.c \ 37 drivers/delay_timer/generic_delay_timer.c \ 38 lib/aarch64/xlat_tables.c \ 39 plat/hisilicon/hikey960/aarch64/hikey960_common.c \ 40 plat/hisilicon/hikey960/hikey960_boardid.c 41 42HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 43 drivers/arm/gic/v2/gicv2_main.c \ 44 drivers/arm/gic/v2/gicv2_helpers.c \ 45 plat/common/plat_gicv2.c 46 47BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 48 drivers/io/io_block.c \ 49 drivers/io/io_fip.c \ 50 drivers/io/io_storage.c \ 51 drivers/synopsys/ufs/dw_ufs.c \ 52 drivers/ufs/ufs.c \ 53 lib/cpus/aarch64/cortex_a53.S \ 54 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 55 plat/hisilicon/hikey960/hikey960_bl1_setup.c \ 56 plat/hisilicon/hikey960/hikey960_io_storage.c \ 57 ${HIKEY960_GIC_SOURCES} 58 59BL2_SOURCES += drivers/io/io_block.c \ 60 drivers/io/io_fip.c \ 61 drivers/io/io_storage.c \ 62 drivers/ufs/ufs.c \ 63 plat/hisilicon/hikey960/hikey960_bl2_setup.c \ 64 plat/hisilicon/hikey960/hikey960_io_storage.c \ 65 plat/hisilicon/hikey960/hikey960_mcu_load.c 66 67ifeq (${LOAD_IMAGE_V2},1) 68BL2_SOURCES += plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \ 69 plat/hisilicon/hikey960/hikey960_image_load.c \ 70 common/desc_image_load.c 71endif 72 73BL31_SOURCES += drivers/arm/cci/cci.c \ 74 lib/cpus/aarch64/cortex_a53.S \ 75 lib/cpus/aarch64/cortex_a72.S \ 76 lib/cpus/aarch64/cortex_a73.S \ 77 plat/common/aarch64/plat_psci_common.c \ 78 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 79 plat/hisilicon/hikey960/hikey960_bl31_setup.c \ 80 plat/hisilicon/hikey960/hikey960_pm.c \ 81 plat/hisilicon/hikey960/hikey960_topology.c \ 82 plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \ 83 plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \ 84 ${HIKEY960_GIC_SOURCES} 85 86# Enable workarounds for selected Cortex-A53 errata. 87ERRATA_A53_836870 := 1 88ERRATA_A53_843419 := 1 89ERRATA_A53_855873 := 1 90