12f2abcf4SHaojian Zhuang# 2c939d13aSMasahiro Yamada# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 32f2abcf4SHaojian Zhuang# 42f2abcf4SHaojian Zhuang# SPDX-License-Identifier: BSD-3-Clause 52f2abcf4SHaojian Zhuang# 62f2abcf4SHaojian Zhuang 72de0c5ccSVictor Chong# Enable version2 of image loading 82de0c5ccSVictor ChongLOAD_IMAGE_V2 := 1 92de0c5ccSVictor Chong 105e3325e7SVictor Chong# On Hikey960, the TSP can execute from TZC secure area in DRAM. 11*3b12a6fcSVictor ChongHIKEY960_TSP_RAM_LOCATION ?= dram 125e3325e7SVictor Chongifeq (${HIKEY960_TSP_RAM_LOCATION}, dram) 135e3325e7SVictor Chong HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID 145e3325e7SVictor Chongelse ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram) 15*3b12a6fcSVictor Chong HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_SRAM_ID 165e3325e7SVictor Chongelse 175e3325e7SVictor Chong $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value") 185e3325e7SVictor Chongendif 195e3325e7SVictor Chong 202f2abcf4SHaojian ZhuangCRASH_CONSOLE_BASE := PL011_UART6_BASE 212f2abcf4SHaojian ZhuangCOLD_BOOT_SINGLE_CPU := 1 222f2abcf4SHaojian ZhuangPROGRAMMABLE_RESET_ADDRESS := 1 233872fc2dSDavid CunadoENABLE_SVE_FOR_NS := 0 242f2abcf4SHaojian Zhuang 252f2abcf4SHaojian Zhuang# Process flags 265e3325e7SVictor Chong$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID)) 272f2abcf4SHaojian Zhuang$(eval $(call add_define,CRASH_CONSOLE_BASE)) 282f2abcf4SHaojian Zhuang 29b16bb16eSVictor Chong# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 30b16bb16eSVictor Chong# in the FIP if the platform requires. 31b16bb16eSVictor Chongifneq ($(BL32_EXTRA1),) 3233950dd8SMasahiro Yamada$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 33b16bb16eSVictor Chongendif 34b16bb16eSVictor Chongifneq ($(BL32_EXTRA2),) 3533950dd8SMasahiro Yamada$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 36b16bb16eSVictor Chongendif 37b16bb16eSVictor Chong 382f2abcf4SHaojian ZhuangENABLE_PLAT_COMPAT := 0 392f2abcf4SHaojian Zhuang 402f2abcf4SHaojian ZhuangUSE_COHERENT_MEM := 1 412f2abcf4SHaojian Zhuang 422f2abcf4SHaojian ZhuangPLAT_INCLUDES := -Iinclude/common/tbbr \ 432f2abcf4SHaojian Zhuang -Iplat/hisilicon/hikey960/include 442f2abcf4SHaojian Zhuang 452f2abcf4SHaojian ZhuangPLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ 462f2abcf4SHaojian Zhuang drivers/delay_timer/delay_timer.c \ 472f2abcf4SHaojian Zhuang drivers/delay_timer/generic_delay_timer.c \ 482f2abcf4SHaojian Zhuang lib/aarch64/xlat_tables.c \ 492f2abcf4SHaojian Zhuang plat/hisilicon/hikey960/aarch64/hikey960_common.c \ 502f2abcf4SHaojian Zhuang plat/hisilicon/hikey960/hikey960_boardid.c 512f2abcf4SHaojian Zhuang 522f2abcf4SHaojian ZhuangHIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 532f2abcf4SHaojian Zhuang drivers/arm/gic/v2/gicv2_main.c \ 542f2abcf4SHaojian Zhuang drivers/arm/gic/v2/gicv2_helpers.c \ 552f2abcf4SHaojian Zhuang plat/common/plat_gicv2.c 562f2abcf4SHaojian Zhuang 572f2abcf4SHaojian ZhuangBL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 582f2abcf4SHaojian Zhuang drivers/io/io_block.c \ 592f2abcf4SHaojian Zhuang drivers/io/io_fip.c \ 602f2abcf4SHaojian Zhuang drivers/io/io_storage.c \ 612f2abcf4SHaojian Zhuang drivers/synopsys/ufs/dw_ufs.c \ 622f2abcf4SHaojian Zhuang drivers/ufs/ufs.c \ 632f2abcf4SHaojian Zhuang lib/cpus/aarch64/cortex_a53.S \ 642f2abcf4SHaojian Zhuang plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 652f2abcf4SHaojian Zhuang plat/hisilicon/hikey960/hikey960_bl1_setup.c \ 662f2abcf4SHaojian Zhuang plat/hisilicon/hikey960/hikey960_io_storage.c \ 672f2abcf4SHaojian Zhuang ${HIKEY960_GIC_SOURCES} 687cb09cb4SHaojian Zhuang 697cb09cb4SHaojian ZhuangBL2_SOURCES += drivers/io/io_block.c \ 707cb09cb4SHaojian Zhuang drivers/io/io_fip.c \ 717cb09cb4SHaojian Zhuang drivers/io/io_storage.c \ 727cb09cb4SHaojian Zhuang drivers/ufs/ufs.c \ 737cb09cb4SHaojian Zhuang plat/hisilicon/hikey960/hikey960_bl2_setup.c \ 747cb09cb4SHaojian Zhuang plat/hisilicon/hikey960/hikey960_io_storage.c \ 757cb09cb4SHaojian Zhuang plat/hisilicon/hikey960/hikey960_mcu_load.c 7628b02e23SHaojian Zhuang 772de0c5ccSVictor Chongifeq (${LOAD_IMAGE_V2},1) 782de0c5ccSVictor ChongBL2_SOURCES += plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \ 792de0c5ccSVictor Chong plat/hisilicon/hikey960/hikey960_image_load.c \ 802de0c5ccSVictor Chong common/desc_image_load.c 81b16bb16eSVictor Chong 82b16bb16eSVictor Chongifeq (${SPD},opteed) 83b16bb16eSVictor ChongBL2_SOURCES += lib/optee/optee_utils.c 84b16bb16eSVictor Chongendif 852de0c5ccSVictor Chongendif 862de0c5ccSVictor Chong 8728b02e23SHaojian ZhuangBL31_SOURCES += drivers/arm/cci/cci.c \ 8828b02e23SHaojian Zhuang lib/cpus/aarch64/cortex_a53.S \ 8928b02e23SHaojian Zhuang lib/cpus/aarch64/cortex_a72.S \ 9028b02e23SHaojian Zhuang lib/cpus/aarch64/cortex_a73.S \ 9128b02e23SHaojian Zhuang plat/common/aarch64/plat_psci_common.c \ 9228b02e23SHaojian Zhuang plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \ 9328b02e23SHaojian Zhuang plat/hisilicon/hikey960/hikey960_bl31_setup.c \ 9428b02e23SHaojian Zhuang plat/hisilicon/hikey960/hikey960_pm.c \ 9528b02e23SHaojian Zhuang plat/hisilicon/hikey960/hikey960_topology.c \ 9628b02e23SHaojian Zhuang plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \ 9728b02e23SHaojian Zhuang plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \ 9828b02e23SHaojian Zhuang ${HIKEY960_GIC_SOURCES} 9997a4943cSVictor Chong 10097a4943cSVictor Chong# Enable workarounds for selected Cortex-A53 errata. 10197a4943cSVictor ChongERRATA_A53_836870 := 1 10297a4943cSVictor ChongERRATA_A53_843419 := 1 10397a4943cSVictor ChongERRATA_A53_855873 := 1 10426bb69cfSLeo Yan 10526bb69cfSLeo YanFIP_ALIGN := 512 106