xref: /rk3399_ARM-atf/plat/hisilicon/hikey960/platform.mk (revision 2de0c5cc4fac47dcc5df295bd1eaf3a6da528424)
12f2abcf4SHaojian Zhuang#
22f2abcf4SHaojian Zhuang# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
32f2abcf4SHaojian Zhuang#
42f2abcf4SHaojian Zhuang# SPDX-License-Identifier: BSD-3-Clause
52f2abcf4SHaojian Zhuang#
62f2abcf4SHaojian Zhuang
7*2de0c5ccSVictor Chong# Enable version2 of image loading
8*2de0c5ccSVictor ChongLOAD_IMAGE_V2	:=	1
9*2de0c5ccSVictor Chong
105e3325e7SVictor Chong# On Hikey960, the TSP can execute from TZC secure area in DRAM.
115e3325e7SVictor ChongHIKEY960_TSP_RAM_LOCATION	:=	dram
125e3325e7SVictor Chongifeq (${HIKEY960_TSP_RAM_LOCATION}, dram)
135e3325e7SVictor Chong  HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID
145e3325e7SVictor Chongelse ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram)
155e3325e7SVictor Chong  HIKEY960_TSP_RAM_LOCATION_ID := HIKEY960_SRAM_ID
165e3325e7SVictor Chongelse
175e3325e7SVictor Chong  $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value")
185e3325e7SVictor Chongendif
195e3325e7SVictor Chong
202f2abcf4SHaojian ZhuangCRASH_CONSOLE_BASE		:=	PL011_UART6_BASE
212f2abcf4SHaojian ZhuangCOLD_BOOT_SINGLE_CPU		:=	1
222f2abcf4SHaojian ZhuangPROGRAMMABLE_RESET_ADDRESS	:=	1
232f2abcf4SHaojian Zhuang
242f2abcf4SHaojian Zhuang# Process flags
255e3325e7SVictor Chong$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID))
262f2abcf4SHaojian Zhuang$(eval $(call add_define,CRASH_CONSOLE_BASE))
272f2abcf4SHaojian Zhuang
282f2abcf4SHaojian ZhuangENABLE_PLAT_COMPAT	:=	0
292f2abcf4SHaojian Zhuang
302f2abcf4SHaojian ZhuangUSE_COHERENT_MEM	:=	1
312f2abcf4SHaojian Zhuang
322f2abcf4SHaojian ZhuangPLAT_INCLUDES		:=	-Iinclude/common/tbbr			\
332f2abcf4SHaojian Zhuang				-Iplat/hisilicon/hikey960/include
342f2abcf4SHaojian Zhuang
352f2abcf4SHaojian ZhuangPLAT_BL_COMMON_SOURCES	:=	drivers/arm/pl011/pl011_console.S	\
362f2abcf4SHaojian Zhuang				drivers/delay_timer/delay_timer.c	\
372f2abcf4SHaojian Zhuang				drivers/delay_timer/generic_delay_timer.c \
382f2abcf4SHaojian Zhuang				lib/aarch64/xlat_tables.c		\
392f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/aarch64/hikey960_common.c \
402f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_boardid.c
412f2abcf4SHaojian Zhuang
422f2abcf4SHaojian ZhuangHIKEY960_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
432f2abcf4SHaojian Zhuang				drivers/arm/gic/v2/gicv2_main.c		\
442f2abcf4SHaojian Zhuang				drivers/arm/gic/v2/gicv2_helpers.c	\
452f2abcf4SHaojian Zhuang				plat/common/plat_gicv2.c
462f2abcf4SHaojian Zhuang
472f2abcf4SHaojian ZhuangBL1_SOURCES		+=	bl1/tbbr/tbbr_img_desc.c		\
482f2abcf4SHaojian Zhuang				drivers/io/io_block.c			\
492f2abcf4SHaojian Zhuang				drivers/io/io_fip.c			\
502f2abcf4SHaojian Zhuang				drivers/io/io_storage.c			\
512f2abcf4SHaojian Zhuang				drivers/synopsys/ufs/dw_ufs.c		\
522f2abcf4SHaojian Zhuang				drivers/ufs/ufs.c 			\
532f2abcf4SHaojian Zhuang				lib/cpus/aarch64/cortex_a53.S		\
542f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
552f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_bl1_setup.c 	\
562f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_io_storage.c \
572f2abcf4SHaojian Zhuang				${HIKEY960_GIC_SOURCES}
587cb09cb4SHaojian Zhuang
597cb09cb4SHaojian ZhuangBL2_SOURCES		+=	drivers/io/io_block.c			\
607cb09cb4SHaojian Zhuang				drivers/io/io_fip.c			\
617cb09cb4SHaojian Zhuang				drivers/io/io_storage.c			\
627cb09cb4SHaojian Zhuang				drivers/ufs/ufs.c			\
637cb09cb4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_bl2_setup.c \
647cb09cb4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_io_storage.c \
657cb09cb4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_mcu_load.c
6628b02e23SHaojian Zhuang
67*2de0c5ccSVictor Chongifeq (${LOAD_IMAGE_V2},1)
68*2de0c5ccSVictor ChongBL2_SOURCES		+=	plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \
69*2de0c5ccSVictor Chong				plat/hisilicon/hikey960/hikey960_image_load.c \
70*2de0c5ccSVictor Chong				common/desc_image_load.c
71*2de0c5ccSVictor Chongendif
72*2de0c5ccSVictor Chong
7328b02e23SHaojian ZhuangBL31_SOURCES		+=	drivers/arm/cci/cci.c			\
7428b02e23SHaojian Zhuang				lib/cpus/aarch64/cortex_a53.S           \
7528b02e23SHaojian Zhuang				lib/cpus/aarch64/cortex_a72.S		\
7628b02e23SHaojian Zhuang				lib/cpus/aarch64/cortex_a73.S		\
7728b02e23SHaojian Zhuang				plat/common/aarch64/plat_psci_common.c  \
7828b02e23SHaojian Zhuang				plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
7928b02e23SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_bl31_setup.c \
8028b02e23SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_pm.c	\
8128b02e23SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_topology.c \
8228b02e23SHaojian Zhuang				plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \
8328b02e23SHaojian Zhuang				plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \
8428b02e23SHaojian Zhuang				${HIKEY960_GIC_SOURCES}
8597a4943cSVictor Chong
8697a4943cSVictor Chong# Enable workarounds for selected Cortex-A53 errata.
8797a4943cSVictor ChongERRATA_A53_836870		:=	1
8897a4943cSVictor ChongERRATA_A53_843419		:=	1
8997a4943cSVictor ChongERRATA_A53_855873		:=	1
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