xref: /rk3399_ARM-atf/plat/hisilicon/hikey960/platform.mk (revision 26bb69cf68bdd51842cdc3de9ef8a96f7cc8c130)
12f2abcf4SHaojian Zhuang#
22f2abcf4SHaojian Zhuang# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
32f2abcf4SHaojian Zhuang#
42f2abcf4SHaojian Zhuang# SPDX-License-Identifier: BSD-3-Clause
52f2abcf4SHaojian Zhuang#
62f2abcf4SHaojian Zhuang
72de0c5ccSVictor Chong# Enable version2 of image loading
82de0c5ccSVictor ChongLOAD_IMAGE_V2	:=	1
92de0c5ccSVictor Chong
105e3325e7SVictor Chong# On Hikey960, the TSP can execute from TZC secure area in DRAM.
115e3325e7SVictor ChongHIKEY960_TSP_RAM_LOCATION	:=	dram
125e3325e7SVictor Chongifeq (${HIKEY960_TSP_RAM_LOCATION}, dram)
135e3325e7SVictor Chong  HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID
145e3325e7SVictor Chongelse ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram)
155e3325e7SVictor Chong  HIKEY960_TSP_RAM_LOCATION_ID := HIKEY960_SRAM_ID
165e3325e7SVictor Chongelse
175e3325e7SVictor Chong  $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value")
185e3325e7SVictor Chongendif
195e3325e7SVictor Chong
202f2abcf4SHaojian ZhuangCRASH_CONSOLE_BASE		:=	PL011_UART6_BASE
212f2abcf4SHaojian ZhuangCOLD_BOOT_SINGLE_CPU		:=	1
222f2abcf4SHaojian ZhuangPROGRAMMABLE_RESET_ADDRESS	:=	1
232f2abcf4SHaojian Zhuang
242f2abcf4SHaojian Zhuang# Process flags
255e3325e7SVictor Chong$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID))
262f2abcf4SHaojian Zhuang$(eval $(call add_define,CRASH_CONSOLE_BASE))
272f2abcf4SHaojian Zhuang
28b16bb16eSVictor Chong# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
29b16bb16eSVictor Chong# in the FIP if the platform requires.
30b16bb16eSVictor Chongifneq ($(BL32_EXTRA1),)
31b16bb16eSVictor Chong$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
32b16bb16eSVictor Chongendif
33b16bb16eSVictor Chongifneq ($(BL32_EXTRA2),)
34b16bb16eSVictor Chong$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
35b16bb16eSVictor Chongendif
36b16bb16eSVictor Chong
372f2abcf4SHaojian ZhuangENABLE_PLAT_COMPAT	:=	0
382f2abcf4SHaojian Zhuang
392f2abcf4SHaojian ZhuangUSE_COHERENT_MEM	:=	1
402f2abcf4SHaojian Zhuang
412f2abcf4SHaojian ZhuangPLAT_INCLUDES		:=	-Iinclude/common/tbbr			\
422f2abcf4SHaojian Zhuang				-Iplat/hisilicon/hikey960/include
432f2abcf4SHaojian Zhuang
442f2abcf4SHaojian ZhuangPLAT_BL_COMMON_SOURCES	:=	drivers/arm/pl011/pl011_console.S	\
452f2abcf4SHaojian Zhuang				drivers/delay_timer/delay_timer.c	\
462f2abcf4SHaojian Zhuang				drivers/delay_timer/generic_delay_timer.c \
472f2abcf4SHaojian Zhuang				lib/aarch64/xlat_tables.c		\
482f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/aarch64/hikey960_common.c \
492f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_boardid.c
502f2abcf4SHaojian Zhuang
512f2abcf4SHaojian ZhuangHIKEY960_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
522f2abcf4SHaojian Zhuang				drivers/arm/gic/v2/gicv2_main.c		\
532f2abcf4SHaojian Zhuang				drivers/arm/gic/v2/gicv2_helpers.c	\
542f2abcf4SHaojian Zhuang				plat/common/plat_gicv2.c
552f2abcf4SHaojian Zhuang
562f2abcf4SHaojian ZhuangBL1_SOURCES		+=	bl1/tbbr/tbbr_img_desc.c		\
572f2abcf4SHaojian Zhuang				drivers/io/io_block.c			\
582f2abcf4SHaojian Zhuang				drivers/io/io_fip.c			\
592f2abcf4SHaojian Zhuang				drivers/io/io_storage.c			\
602f2abcf4SHaojian Zhuang				drivers/synopsys/ufs/dw_ufs.c		\
612f2abcf4SHaojian Zhuang				drivers/ufs/ufs.c 			\
622f2abcf4SHaojian Zhuang				lib/cpus/aarch64/cortex_a53.S		\
632f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
642f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_bl1_setup.c 	\
652f2abcf4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_io_storage.c \
662f2abcf4SHaojian Zhuang				${HIKEY960_GIC_SOURCES}
677cb09cb4SHaojian Zhuang
687cb09cb4SHaojian ZhuangBL2_SOURCES		+=	drivers/io/io_block.c			\
697cb09cb4SHaojian Zhuang				drivers/io/io_fip.c			\
707cb09cb4SHaojian Zhuang				drivers/io/io_storage.c			\
717cb09cb4SHaojian Zhuang				drivers/ufs/ufs.c			\
727cb09cb4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_bl2_setup.c \
737cb09cb4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_io_storage.c \
747cb09cb4SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_mcu_load.c
7528b02e23SHaojian Zhuang
762de0c5ccSVictor Chongifeq (${LOAD_IMAGE_V2},1)
772de0c5ccSVictor ChongBL2_SOURCES		+=	plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \
782de0c5ccSVictor Chong				plat/hisilicon/hikey960/hikey960_image_load.c \
792de0c5ccSVictor Chong				common/desc_image_load.c
80b16bb16eSVictor Chong
81b16bb16eSVictor Chongifeq (${SPD},opteed)
82b16bb16eSVictor ChongBL2_SOURCES		+=	lib/optee/optee_utils.c
83b16bb16eSVictor Chongendif
842de0c5ccSVictor Chongendif
852de0c5ccSVictor Chong
8628b02e23SHaojian ZhuangBL31_SOURCES		+=	drivers/arm/cci/cci.c			\
8728b02e23SHaojian Zhuang				lib/cpus/aarch64/cortex_a53.S           \
8828b02e23SHaojian Zhuang				lib/cpus/aarch64/cortex_a72.S		\
8928b02e23SHaojian Zhuang				lib/cpus/aarch64/cortex_a73.S		\
9028b02e23SHaojian Zhuang				plat/common/aarch64/plat_psci_common.c  \
9128b02e23SHaojian Zhuang				plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
9228b02e23SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_bl31_setup.c \
9328b02e23SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_pm.c	\
9428b02e23SHaojian Zhuang				plat/hisilicon/hikey960/hikey960_topology.c \
9528b02e23SHaojian Zhuang				plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \
9628b02e23SHaojian Zhuang				plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \
9728b02e23SHaojian Zhuang				${HIKEY960_GIC_SOURCES}
9897a4943cSVictor Chong
9997a4943cSVictor Chong# Enable workarounds for selected Cortex-A53 errata.
10097a4943cSVictor ChongERRATA_A53_836870		:=	1
10197a4943cSVictor ChongERRATA_A53_843419		:=	1
10297a4943cSVictor ChongERRATA_A53_855873		:=	1
103*26bb69cfSLeo Yan
104*26bb69cfSLeo YanFIP_ALIGN			:=	512
105