1*2f2abcf4SHaojian Zhuang /* 2*2f2abcf4SHaojian Zhuang * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*2f2abcf4SHaojian Zhuang * 4*2f2abcf4SHaojian Zhuang * SPDX-License-Identifier: BSD-3-Clause 5*2f2abcf4SHaojian Zhuang */ 6*2f2abcf4SHaojian Zhuang 7*2f2abcf4SHaojian Zhuang #ifndef __HI3660_MEM_MAP__ 8*2f2abcf4SHaojian Zhuang #define __HI3660_MEM_MAP__ 9*2f2abcf4SHaojian Zhuang 10*2f2abcf4SHaojian Zhuang #define HISI_DATA_HEAD_BASE (0x89C44400) 11*2f2abcf4SHaojian Zhuang 12*2f2abcf4SHaojian Zhuang #define HISI_RESERVED_MEM_BASE (0x89C80000) 13*2f2abcf4SHaojian Zhuang #define HISI_RESERVED_MEM_SIZE (0x00040000) 14*2f2abcf4SHaojian Zhuang 15*2f2abcf4SHaojian Zhuang #define HISI_DATA0_BASE (0x89C96180) 16*2f2abcf4SHaojian Zhuang #define HISI_DATA0_SIZE (0x000003A0) 17*2f2abcf4SHaojian Zhuang #define HISI_DATA1_BASE (0x89C93480) 18*2f2abcf4SHaojian Zhuang #define HISI_DATA1_SIZE (0x00002D00) 19*2f2abcf4SHaojian Zhuang 20*2f2abcf4SHaojian Zhuang #endif /* __HI3660_MEM_MAP__ */ 21