xref: /rk3399_ARM-atf/plat/hisilicon/hikey960/hikey960_topology.c (revision 28b02e2348f92cfb702695c970b893768471392d)
1*28b02e23SHaojian Zhuang /*
2*28b02e23SHaojian Zhuang  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*28b02e23SHaojian Zhuang  *
4*28b02e23SHaojian Zhuang  * SPDX-License-Identifier: BSD-3-Clause
5*28b02e23SHaojian Zhuang  */
6*28b02e23SHaojian Zhuang #include <arch.h>
7*28b02e23SHaojian Zhuang #include <platform_def.h>
8*28b02e23SHaojian Zhuang #include <psci.h>
9*28b02e23SHaojian Zhuang 
10*28b02e23SHaojian Zhuang /*
11*28b02e23SHaojian Zhuang  * The HiKey power domain tree descriptor. The cluster power domains
12*28b02e23SHaojian Zhuang  * are arranged so that when the PSCI generic code creates the power
13*28b02e23SHaojian Zhuang  * domain tree, the indices of the CPU power domain nodes it allocates
14*28b02e23SHaojian Zhuang  * match the linear indices returned by plat_core_pos_by_mpidr().
15*28b02e23SHaojian Zhuang  */
16*28b02e23SHaojian Zhuang const unsigned char hikey960_power_domain_tree_desc[] = {
17*28b02e23SHaojian Zhuang 	/* Number of root nodes */
18*28b02e23SHaojian Zhuang 	1,
19*28b02e23SHaojian Zhuang 	/* Number of clusters */
20*28b02e23SHaojian Zhuang 	PLATFORM_CLUSTER_COUNT,
21*28b02e23SHaojian Zhuang 	/* Number of children for the first cluster node */
22*28b02e23SHaojian Zhuang 	PLATFORM_CORE_COUNT_PER_CLUSTER,
23*28b02e23SHaojian Zhuang 	/* Number of children for the second cluster node */
24*28b02e23SHaojian Zhuang 	PLATFORM_CORE_COUNT_PER_CLUSTER,
25*28b02e23SHaojian Zhuang };
26*28b02e23SHaojian Zhuang 
27*28b02e23SHaojian Zhuang /*******************************************************************************
28*28b02e23SHaojian Zhuang  * This function returns the HiKey topology tree information.
29*28b02e23SHaojian Zhuang  ******************************************************************************/
30*28b02e23SHaojian Zhuang const unsigned char *plat_get_power_domain_tree_desc(void)
31*28b02e23SHaojian Zhuang {
32*28b02e23SHaojian Zhuang 	return hikey960_power_domain_tree_desc;
33*28b02e23SHaojian Zhuang }
34*28b02e23SHaojian Zhuang 
35*28b02e23SHaojian Zhuang /*******************************************************************************
36*28b02e23SHaojian Zhuang  * This function implements a part of the critical interface between the psci
37*28b02e23SHaojian Zhuang  * generic layer and the platform that allows the former to query the platform
38*28b02e23SHaojian Zhuang  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
39*28b02e23SHaojian Zhuang  * in case the MPIDR is invalid.
40*28b02e23SHaojian Zhuang  ******************************************************************************/
41*28b02e23SHaojian Zhuang int plat_core_pos_by_mpidr(u_register_t mpidr)
42*28b02e23SHaojian Zhuang {
43*28b02e23SHaojian Zhuang 	unsigned int cluster_id, cpu_id;
44*28b02e23SHaojian Zhuang 
45*28b02e23SHaojian Zhuang 	mpidr &= MPIDR_AFFINITY_MASK;
46*28b02e23SHaojian Zhuang 
47*28b02e23SHaojian Zhuang 	if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
48*28b02e23SHaojian Zhuang 		return -1;
49*28b02e23SHaojian Zhuang 
50*28b02e23SHaojian Zhuang 	cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
51*28b02e23SHaojian Zhuang 	cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
52*28b02e23SHaojian Zhuang 
53*28b02e23SHaojian Zhuang 	if (cluster_id >= PLATFORM_CLUSTER_COUNT)
54*28b02e23SHaojian Zhuang 		return -1;
55*28b02e23SHaojian Zhuang 
56*28b02e23SHaojian Zhuang 	/*
57*28b02e23SHaojian Zhuang 	 * Validate cpu_id by checking whether it represents a CPU in
58*28b02e23SHaojian Zhuang 	 * one of the two clusters present on the platform.
59*28b02e23SHaojian Zhuang 	 */
60*28b02e23SHaojian Zhuang 	if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER)
61*28b02e23SHaojian Zhuang 		return -1;
62*28b02e23SHaojian Zhuang 
63*28b02e23SHaojian Zhuang 	return (cpu_id + (cluster_id * 4));
64*28b02e23SHaojian Zhuang }
65