1*7cb09cb4SHaojian Zhuang /* 2*7cb09cb4SHaojian Zhuang * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*7cb09cb4SHaojian Zhuang * 4*7cb09cb4SHaojian Zhuang * SPDX-License-Identifier: BSD-3-Clause 5*7cb09cb4SHaojian Zhuang */ 6*7cb09cb4SHaojian Zhuang 7*7cb09cb4SHaojian Zhuang #include <arch_helpers.h> 8*7cb09cb4SHaojian Zhuang #include <assert.h> 9*7cb09cb4SHaojian Zhuang #include <bl_common.h> 10*7cb09cb4SHaojian Zhuang #include <debug.h> 11*7cb09cb4SHaojian Zhuang #include <delay_timer.h> 12*7cb09cb4SHaojian Zhuang #include <errno.h> 13*7cb09cb4SHaojian Zhuang #include <hi3660.h> 14*7cb09cb4SHaojian Zhuang #include <mmio.h> 15*7cb09cb4SHaojian Zhuang #include <string.h> 16*7cb09cb4SHaojian Zhuang 17*7cb09cb4SHaojian Zhuang #define ADDR_CONVERT(addr) ((addr) < 0x40000 ? \ 18*7cb09cb4SHaojian Zhuang (addr) + 0xFFF30000 : \ 19*7cb09cb4SHaojian Zhuang (addr) + 0x40000000) 20*7cb09cb4SHaojian Zhuang 21*7cb09cb4SHaojian Zhuang static void fw_data_init(void) 22*7cb09cb4SHaojian Zhuang { 23*7cb09cb4SHaojian Zhuang unsigned long data_head_addr; 24*7cb09cb4SHaojian Zhuang unsigned int *data_addr; 25*7cb09cb4SHaojian Zhuang 26*7cb09cb4SHaojian Zhuang data_head_addr = mmio_read_32((uintptr_t) HISI_DATA_HEAD_BASE) + 0x14; 27*7cb09cb4SHaojian Zhuang data_addr = (unsigned int *) ADDR_CONVERT(data_head_addr); 28*7cb09cb4SHaojian Zhuang 29*7cb09cb4SHaojian Zhuang memcpy((void *)HISI_DATA0_BASE, 30*7cb09cb4SHaojian Zhuang (const void *)(unsigned long)ADDR_CONVERT(data_addr[0]), 31*7cb09cb4SHaojian Zhuang HISI_DATA0_SIZE); 32*7cb09cb4SHaojian Zhuang memcpy((void *)HISI_DATA1_BASE, 33*7cb09cb4SHaojian Zhuang (const void *)(unsigned long)ADDR_CONVERT(data_addr[1]), 34*7cb09cb4SHaojian Zhuang HISI_DATA1_SIZE); 35*7cb09cb4SHaojian Zhuang } 36*7cb09cb4SHaojian Zhuang 37*7cb09cb4SHaojian Zhuang int load_lpm3(void) 38*7cb09cb4SHaojian Zhuang { 39*7cb09cb4SHaojian Zhuang INFO("start fw loading\n"); 40*7cb09cb4SHaojian Zhuang 41*7cb09cb4SHaojian Zhuang fw_data_init(); 42*7cb09cb4SHaojian Zhuang 43*7cb09cb4SHaojian Zhuang flush_dcache_range((uintptr_t)HISI_RESERVED_MEM_BASE, 44*7cb09cb4SHaojian Zhuang HISI_RESERVED_MEM_SIZE); 45*7cb09cb4SHaojian Zhuang 46*7cb09cb4SHaojian Zhuang sev(); 47*7cb09cb4SHaojian Zhuang sev(); 48*7cb09cb4SHaojian Zhuang 49*7cb09cb4SHaojian Zhuang INFO("fw load success\n"); 50*7cb09cb4SHaojian Zhuang 51*7cb09cb4SHaojian Zhuang return 0; 52*7cb09cb4SHaojian Zhuang } 53