xref: /rk3399_ARM-atf/plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.h (revision 5c92aeab4f74357be61251dae601e41f5adc9991)
128b02e23SHaojian Zhuang /*
228b02e23SHaojian Zhuang  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
328b02e23SHaojian Zhuang  *
428b02e23SHaojian Zhuang  * SPDX-License-Identifier: BSD-3-Clause
528b02e23SHaojian Zhuang  */
628b02e23SHaojian Zhuang 
7c3cf06f1SAntonio Nino Diaz #ifndef HISI_PWRC_H
8c3cf06f1SAntonio Nino Diaz #define HISI_PWRC_H
928b02e23SHaojian Zhuang 
1028b02e23SHaojian Zhuang #include <hi3660.h>
1128b02e23SHaojian Zhuang #include <hi3660_crg.h>
1228b02e23SHaojian Zhuang 
1328b02e23SHaojian Zhuang #define PCTRL_BASE					(PCTRL_REG_BASE)
1428b02e23SHaojian Zhuang #define CRG_BASE					(CRG_REG_BASE)
1528b02e23SHaojian Zhuang 
1628b02e23SHaojian Zhuang #define SOC_CRGPERIPH_A53_PDCEN_ADDR(base)		((base) + (0x260))
1728b02e23SHaojian Zhuang #define SOC_CRGPERIPH_MAIA_PDCEN_ADDR(base)		((base) + (0x300))
1828b02e23SHaojian Zhuang 
1928b02e23SHaojian Zhuang #define SOC_PCTRL_RESOURCE0_LOCK_ADDR(base)		((base) + (0x400))
2028b02e23SHaojian Zhuang #define SOC_PCTRL_RESOURCE0_UNLOCK_ADDR(base)		((base) + (0x404))
2128b02e23SHaojian Zhuang #define SOC_PCTRL_RESOURCE0_LOCK_ST_ADDR(base)		((base) + (0x408))
2228b02e23SHaojian Zhuang #define SOC_PCTRL_RESOURCE1_LOCK_ADDR(base)		((base) + (0x40C))
2328b02e23SHaojian Zhuang #define SOC_PCTRL_RESOURCE1_UNLOCK_ADDR(base)		((base) + (0x410))
2428b02e23SHaojian Zhuang #define SOC_PCTRL_RESOURCE1_LOCK_ST_ADDR(base)		((base) + (0x414))
2528b02e23SHaojian Zhuang #define SOC_PCTRL_RESOURCE2_LOCK_ADDR(base)		((base) + (0x418))
2628b02e23SHaojian Zhuang 
2728b02e23SHaojian Zhuang #define SOC_SCTRL_SCBAKDATA3_ADDR(base)			((base) + (0x418))
2828b02e23SHaojian Zhuang #define SOC_SCTRL_SCBAKDATA8_ADDR(base)			((base) + (0x42C))
2928b02e23SHaojian Zhuang #define SOC_SCTRL_SCBAKDATA9_ADDR(base)			((base) + (0x430))
3028b02e23SHaojian Zhuang 
3128b02e23SHaojian Zhuang #define SOC_ACPU_SCTRL_BASE_ADDR			(0xFFF0A000)
3228b02e23SHaojian Zhuang 
3328b02e23SHaojian Zhuang void hisi_cpuidle_lock(unsigned int cluster, unsigned int core);
3428b02e23SHaojian Zhuang void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core);
3528b02e23SHaojian Zhuang void hisi_set_cpuidle_flag(unsigned int cluster, unsigned int core);
3628b02e23SHaojian Zhuang void hisi_clear_cpuidle_flag(unsigned int cluster, unsigned int core);
3728b02e23SHaojian Zhuang void hisi_set_cpu_boot_flag(unsigned int cluster, unsigned int core);
3828b02e23SHaojian Zhuang void hisi_clear_cpu_boot_flag(unsigned int cluster, unsigned int core);
3928b02e23SHaojian Zhuang int cluster_is_powered_on(unsigned int cluster);
4028b02e23SHaojian Zhuang void hisi_enter_core_idle(unsigned int cluster, unsigned int core);
4128b02e23SHaojian Zhuang void hisi_enter_cluster_idle(unsigned int cluster, unsigned int core);
42*7d76df7dSWei Yu int hisi_test_ap_suspend_flag(void);
4328b02e23SHaojian Zhuang void hisi_enter_ap_suspend(unsigned int cluster, unsigned int core);
4428b02e23SHaojian Zhuang 
4528b02e23SHaojian Zhuang 
4628b02e23SHaojian Zhuang /* pdc api */
4728b02e23SHaojian Zhuang void hisi_pdc_mask_cluster_wakeirq(unsigned int cluster);
4828b02e23SHaojian Zhuang int hisi_test_pwrdn_allcores(unsigned int cluster, unsigned int core);
4928b02e23SHaojian Zhuang void hisi_disable_pdc(unsigned int cluster);
5028b02e23SHaojian Zhuang void hisi_enable_pdc(unsigned int cluster);
5128b02e23SHaojian Zhuang void hisi_powerup_core(unsigned int cluster, unsigned int core);
5228b02e23SHaojian Zhuang void hisi_powerdn_core(unsigned int cluster, unsigned int core);
5328b02e23SHaojian Zhuang void hisi_powerup_cluster(unsigned int cluster, unsigned int core);
5428b02e23SHaojian Zhuang void hisi_powerdn_cluster(unsigned int cluster, unsigned int core);
5528b02e23SHaojian Zhuang unsigned int hisi_test_cpu_down(unsigned int cluster, unsigned int core);
5628b02e23SHaojian Zhuang 
57c3cf06f1SAntonio Nino Diaz #endif /* HISI_PWRC_H */
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