1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <arm_gic.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <debug.h> 12 #include <mmio.h> 13 #include <platform.h> 14 #include <platform_def.h> 15 #include <xlat_tables.h> 16 17 #include "../hikey960_def.h" 18 #include "../hikey960_private.h" 19 20 #define MAP_DDR MAP_REGION_FLAT(DDR_BASE, \ 21 DDR_SIZE - DDR_SEC_SIZE, \ 22 MT_MEMORY | MT_RW | MT_NS) 23 24 #define MAP_DEVICE MAP_REGION_FLAT(DEVICE_BASE, \ 25 DEVICE_SIZE, \ 26 MT_DEVICE | MT_RW | MT_SECURE) 27 28 #define MAP_BL1_RW MAP_REGION_FLAT(BL1_RW_BASE, \ 29 BL1_RW_LIMIT - BL1_RW_BASE, \ 30 MT_MEMORY | MT_RW | MT_NS) 31 32 #define MAP_UFS_DATA MAP_REGION_FLAT(HIKEY960_UFS_DATA_BASE, \ 33 HIKEY960_UFS_DATA_SIZE, \ 34 MT_MEMORY | MT_RW | MT_NS) 35 36 #define MAP_UFS_DESC MAP_REGION_FLAT(HIKEY960_UFS_DESC_BASE, \ 37 HIKEY960_UFS_DESC_SIZE, \ 38 MT_MEMORY | MT_RW | MT_NS) 39 40 #define MAP_TSP_MEM MAP_REGION_FLAT(TSP_SEC_MEM_BASE, \ 41 TSP_SEC_MEM_SIZE, \ 42 MT_MEMORY | MT_RW | MT_SECURE) 43 44 /* 45 * Table of regions for different BL stages to map using the MMU. 46 * This doesn't include Trusted RAM as the 'mem_layout' argument passed to 47 * hikey960_init_mmu_elx() will give the available subset of that, 48 */ 49 #ifdef IMAGE_BL1 50 static const mmap_region_t hikey960_mmap[] = { 51 MAP_UFS_DATA, 52 MAP_BL1_RW, 53 MAP_UFS_DESC, 54 MAP_DEVICE, 55 {0} 56 }; 57 #endif 58 59 #ifdef IMAGE_BL2 60 static const mmap_region_t hikey960_mmap[] = { 61 MAP_DDR, 62 MAP_DEVICE, 63 MAP_TSP_MEM, 64 {0} 65 }; 66 #endif 67 68 #ifdef IMAGE_BL31 69 static const mmap_region_t hikey960_mmap[] = { 70 MAP_DEVICE, 71 MAP_TSP_MEM, 72 {0} 73 }; 74 #endif 75 76 #ifdef IMAGE_BL32 77 static const mmap_region_t hikey960_mmap[] = { 78 MAP_DEVICE, 79 MAP_DDR, 80 {0} 81 }; 82 #endif 83 84 /* 85 * Macro generating the code for the function setting up the pagetables as per 86 * the platform memory map & initialize the mmu, for the given exception level 87 */ 88 #define HIKEY960_CONFIGURE_MMU_EL(_el) \ 89 void hikey960_init_mmu_el##_el(unsigned long total_base, \ 90 unsigned long total_size, \ 91 unsigned long ro_start, \ 92 unsigned long ro_limit, \ 93 unsigned long coh_start, \ 94 unsigned long coh_limit) \ 95 { \ 96 mmap_add_region(total_base, total_base, \ 97 total_size, \ 98 MT_MEMORY | MT_RW | MT_SECURE); \ 99 mmap_add_region(ro_start, ro_start, \ 100 ro_limit - ro_start, \ 101 MT_MEMORY | MT_RO | MT_SECURE); \ 102 mmap_add_region(coh_start, coh_start, \ 103 coh_limit - coh_start, \ 104 MT_DEVICE | MT_RW | MT_SECURE); \ 105 mmap_add(hikey960_mmap); \ 106 init_xlat_tables(); \ 107 \ 108 enable_mmu_el##_el(0); \ 109 } 110 111 /* Define EL1 and EL3 variants of the function initialising the MMU */ 112 HIKEY960_CONFIGURE_MMU_EL(1) 113 HIKEY960_CONFIGURE_MMU_EL(3) 114 115 unsigned long plat_get_ns_image_entrypoint(void) 116 { 117 return NS_BL1U_BASE; 118 } 119 120 unsigned int plat_get_syscnt_freq2(void) 121 { 122 return 1920000; 123 } 124