1# 2# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Non-TF Boot ROM 8BL2_AT_EL3 := 1 9 10# On Hikey, the TSP can execute from TZC secure area in DRAM (default) 11# or SRAM. 12HIKEY_TSP_RAM_LOCATION ?= dram 13ifeq (${HIKEY_TSP_RAM_LOCATION}, dram) 14 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID 15else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram) 16 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID 17else 18 $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value") 19endif 20 21CONSOLE_BASE := PL011_UART3_BASE 22CRASH_CONSOLE_BASE := PL011_UART3_BASE 23MULTI_CONSOLE_API := 1 24PLAT_PARTITION_MAX_ENTRIES := 12 25PLAT_PL061_MAX_GPIOS := 160 26COLD_BOOT_SINGLE_CPU := 1 27PROGRAMMABLE_RESET_ADDRESS := 1 28ENABLE_SVE_FOR_NS := 0 29 30# Process flags 31$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID)) 32$(eval $(call add_define,CONSOLE_BASE)) 33$(eval $(call add_define,CRASH_CONSOLE_BASE)) 34$(eval $(call add_define,PLAT_PL061_MAX_GPIOS)) 35$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES)) 36 37# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 38# in the FIP if the platform requires. 39ifneq ($(BL32_EXTRA1),) 40$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 41endif 42ifneq ($(BL32_EXTRA2),) 43$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 44endif 45 46USE_COHERENT_MEM := 1 47 48PLAT_INCLUDES := -Iplat/hisilicon/hikey/include 49 50PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \ 51 lib/xlat_tables/aarch64/xlat_tables.c \ 52 lib/xlat_tables/xlat_tables_common.c \ 53 plat/hisilicon/hikey/aarch64/hikey_common.c 54 55BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 56 drivers/arm/pl061/pl061_gpio.c \ 57 drivers/arm/sp804/sp804_delay_timer.c \ 58 drivers/delay_timer/delay_timer.c \ 59 drivers/gpio/gpio.c \ 60 drivers/io/io_block.c \ 61 drivers/io/io_fip.c \ 62 drivers/io/io_storage.c \ 63 drivers/mmc/mmc.c \ 64 drivers/synopsys/emmc/dw_mmc.c \ 65 lib/cpus/aarch64/cortex_a53.S \ 66 plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 67 plat/hisilicon/hikey/hikey_bl1_setup.c \ 68 plat/hisilicon/hikey/hikey_bl_common.c \ 69 plat/hisilicon/hikey/hikey_io_storage.c 70 71BL2_SOURCES += common/desc_image_load.c \ 72 drivers/arm/pl061/pl061_gpio.c \ 73 drivers/arm/sp804/sp804_delay_timer.c \ 74 drivers/delay_timer/delay_timer.c \ 75 drivers/gpio/gpio.c \ 76 drivers/io/io_block.c \ 77 drivers/io/io_fip.c \ 78 drivers/io/io_storage.c \ 79 drivers/mmc/mmc.c \ 80 drivers/synopsys/emmc/dw_mmc.c \ 81 lib/cpus/aarch64/cortex_a53.S \ 82 plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 83 plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \ 84 plat/hisilicon/hikey/hikey_bl2_setup.c \ 85 plat/hisilicon/hikey/hikey_bl_common.c \ 86 plat/hisilicon/hikey/hikey_security.c \ 87 plat/hisilicon/hikey/hikey_ddr.c \ 88 plat/hisilicon/hikey/hikey_image_load.c \ 89 plat/hisilicon/hikey/hikey_io_storage.c \ 90 plat/hisilicon/hikey/hisi_dvfs.c \ 91 plat/hisilicon/hikey/hisi_mcu.c 92 93ifeq (${SPD},opteed) 94BL2_SOURCES += lib/optee/optee_utils.c 95endif 96 97HIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 98 drivers/arm/gic/v2/gicv2_main.c \ 99 drivers/arm/gic/v2/gicv2_helpers.c \ 100 plat/common/plat_gicv2.c 101 102BL31_SOURCES += drivers/arm/cci/cci.c \ 103 drivers/arm/sp804/sp804_delay_timer.c \ 104 drivers/delay_timer/delay_timer.c \ 105 lib/cpus/aarch64/cortex_a53.S \ 106 plat/common/plat_psci_common.c \ 107 plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 108 plat/hisilicon/hikey/hikey_bl31_setup.c \ 109 plat/hisilicon/hikey/hikey_pm.c \ 110 plat/hisilicon/hikey/hikey_topology.c \ 111 plat/hisilicon/hikey/hisi_ipc.c \ 112 plat/hisilicon/hikey/hisi_pwrc.c \ 113 plat/hisilicon/hikey/hisi_pwrc_sram.S \ 114 ${HIKEY_GIC_SOURCES} 115ifeq (${ENABLE_PMF}, 1) 116BL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \ 117 lib/pmf/pmf_smc.c 118endif 119 120ifneq (${TRUSTED_BOARD_BOOT},0) 121 122include drivers/auth/mbedtls/mbedtls_crypto.mk 123include drivers/auth/mbedtls/mbedtls_x509.mk 124 125AUTH_SOURCES := drivers/auth/auth_mod.c \ 126 drivers/auth/crypto_mod.c \ 127 drivers/auth/img_parser_mod.c \ 128 drivers/auth/tbbr/tbbr_cot.c 129 130BL1_SOURCES += ${AUTH_SOURCES} \ 131 plat/common/tbbr/plat_tbbr.c \ 132 plat/hisilicon/hikey/hikey_tbbr.c \ 133 plat/hisilicon/hikey/hikey_rotpk.S 134 135BL2_SOURCES += ${AUTH_SOURCES} \ 136 plat/common/tbbr/plat_tbbr.c \ 137 plat/hisilicon/hikey/hikey_tbbr.c \ 138 plat/hisilicon/hikey/hikey_rotpk.S 139 140ROT_KEY = $(BUILD_PLAT)/rot_key.pem 141ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 142 143$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 144$(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH) 145$(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH) 146 147certificates: $(ROT_KEY) 148$(ROT_KEY): | $(BUILD_PLAT) 149 @echo " OPENSSL $@" 150 $(Q)openssl genrsa 2048 > $@ 2>/dev/null 151 152$(ROTPK_HASH): $(ROT_KEY) 153 @echo " OPENSSL $@" 154 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 155 openssl dgst -sha256 -binary > $@ 2>/dev/null 156endif 157 158# Enable workarounds for selected Cortex-A53 errata. 159ERRATA_A53_836870 := 1 160ERRATA_A53_843419 := 1 161ERRATA_A53_855873 := 1 162 163WORKAROUND_CVE_2017_5715 := 0 164 165FIP_ALIGN := 512 166