1# 2# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Enable version2 of image loading 8LOAD_IMAGE_V2 := 1 9 10# Non-TF Boot ROM 11BL2_AT_EL3 := 1 12 13# On Hikey, the TSP can execute from TZC secure area in DRAM (default) 14# or SRAM. 15HIKEY_TSP_RAM_LOCATION ?= dram 16ifeq (${HIKEY_TSP_RAM_LOCATION}, dram) 17 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID 18else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram) 19 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID 20else 21 $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value") 22endif 23 24CONSOLE_BASE := PL011_UART3_BASE 25CRASH_CONSOLE_BASE := PL011_UART3_BASE 26PLAT_PARTITION_MAX_ENTRIES := 12 27PLAT_PL061_MAX_GPIOS := 160 28COLD_BOOT_SINGLE_CPU := 1 29PROGRAMMABLE_RESET_ADDRESS := 1 30ENABLE_SVE_FOR_NS := 0 31 32# Process flags 33$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID)) 34$(eval $(call add_define,CONSOLE_BASE)) 35$(eval $(call add_define,CRASH_CONSOLE_BASE)) 36$(eval $(call add_define,PLAT_PL061_MAX_GPIOS)) 37$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES)) 38 39# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 40# in the FIP if the platform requires. 41ifneq ($(BL32_EXTRA1),) 42$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 43endif 44ifneq ($(BL32_EXTRA2),) 45$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 46endif 47 48ENABLE_PLAT_COMPAT := 0 49 50USE_COHERENT_MEM := 1 51 52PLAT_INCLUDES := -Iinclude/common/tbbr \ 53 -Iinclude/drivers/synopsys \ 54 -Iplat/hisilicon/hikey/include 55 56PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ 57 lib/aarch64/xlat_tables.c \ 58 plat/hisilicon/hikey/aarch64/hikey_common.c 59 60BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 61 drivers/arm/pl061/pl061_gpio.c \ 62 drivers/arm/sp804/sp804_delay_timer.c \ 63 drivers/delay_timer/delay_timer.c \ 64 drivers/gpio/gpio.c \ 65 drivers/io/io_block.c \ 66 drivers/io/io_fip.c \ 67 drivers/io/io_storage.c \ 68 drivers/emmc/emmc.c \ 69 drivers/synopsys/emmc/dw_mmc.c \ 70 lib/cpus/aarch64/cortex_a53.S \ 71 plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 72 plat/hisilicon/hikey/hikey_bl1_setup.c \ 73 plat/hisilicon/hikey/hikey_bl_common.c \ 74 plat/hisilicon/hikey/hikey_io_storage.c 75 76BL2_SOURCES += common/desc_image_load.c \ 77 drivers/arm/pl061/pl061_gpio.c \ 78 drivers/arm/sp804/sp804_delay_timer.c \ 79 drivers/delay_timer/delay_timer.c \ 80 drivers/gpio/gpio.c \ 81 drivers/io/io_block.c \ 82 drivers/io/io_fip.c \ 83 drivers/io/io_storage.c \ 84 drivers/emmc/emmc.c \ 85 drivers/synopsys/emmc/dw_mmc.c \ 86 lib/cpus/aarch64/cortex_a53.S \ 87 plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 88 plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \ 89 plat/hisilicon/hikey/hikey_bl2_setup.c \ 90 plat/hisilicon/hikey/hikey_bl_common.c \ 91 plat/hisilicon/hikey/hikey_security.c \ 92 plat/hisilicon/hikey/hikey_ddr.c \ 93 plat/hisilicon/hikey/hikey_image_load.c \ 94 plat/hisilicon/hikey/hikey_io_storage.c \ 95 plat/hisilicon/hikey/hisi_dvfs.c \ 96 plat/hisilicon/hikey/hisi_mcu.c 97 98ifeq (${SPD},opteed) 99BL2_SOURCES += lib/optee/optee_utils.c 100endif 101 102HIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 103 drivers/arm/gic/v2/gicv2_main.c \ 104 drivers/arm/gic/v2/gicv2_helpers.c \ 105 plat/common/plat_gicv2.c 106 107BL31_SOURCES += drivers/arm/cci/cci.c \ 108 drivers/arm/sp804/sp804_delay_timer.c \ 109 drivers/delay_timer/delay_timer.c \ 110 lib/cpus/aarch64/cortex_a53.S \ 111 plat/common/aarch64/plat_psci_common.c \ 112 plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 113 plat/hisilicon/hikey/hikey_bl31_setup.c \ 114 plat/hisilicon/hikey/hikey_pm.c \ 115 plat/hisilicon/hikey/hikey_topology.c \ 116 plat/hisilicon/hikey/hisi_ipc.c \ 117 plat/hisilicon/hikey/hisi_pwrc.c \ 118 plat/hisilicon/hikey/hisi_pwrc_sram.S \ 119 ${HIKEY_GIC_SOURCES} 120ifeq (${ENABLE_PMF}, 1) 121BL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \ 122 lib/pmf/pmf_smc.c 123endif 124 125ifneq (${TRUSTED_BOARD_BOOT},0) 126 127include drivers/auth/mbedtls/mbedtls_crypto.mk 128include drivers/auth/mbedtls/mbedtls_x509.mk 129 130USE_TBBR_DEFS := 1 131 132AUTH_SOURCES := drivers/auth/auth_mod.c \ 133 drivers/auth/crypto_mod.c \ 134 drivers/auth/img_parser_mod.c \ 135 drivers/auth/tbbr/tbbr_cot.c 136 137BL1_SOURCES += ${AUTH_SOURCES} \ 138 plat/common/tbbr/plat_tbbr.c \ 139 plat/hisilicon/hikey/hikey_tbbr.c \ 140 plat/hisilicon/hikey/hikey_rotpk.S 141 142BL2_SOURCES += ${AUTH_SOURCES} \ 143 plat/common/tbbr/plat_tbbr.c \ 144 plat/hisilicon/hikey/hikey_tbbr.c \ 145 plat/hisilicon/hikey/hikey_rotpk.S 146 147ROT_KEY = $(BUILD_PLAT)/rot_key.pem 148ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 149 150$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 151$(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH) 152$(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH) 153 154certificates: $(ROT_KEY) 155$(ROT_KEY): | $(BUILD_PLAT) 156 @echo " OPENSSL $@" 157 $(Q)openssl genrsa 2048 > $@ 2>/dev/null 158 159$(ROTPK_HASH): $(ROT_KEY) 160 @echo " OPENSSL $@" 161 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 162 openssl dgst -sha256 -binary > $@ 2>/dev/null 163endif 164 165# Enable workarounds for selected Cortex-A53 errata. 166ERRATA_A53_836870 := 1 167ERRATA_A53_843419 := 1 168ERRATA_A53_855873 := 1 169 170WORKAROUND_CVE_2017_5715 := 0 171 172FIP_ALIGN := 512 173