xref: /rk3399_ARM-atf/plat/hisilicon/hikey/platform.mk (revision 3429c77ab09b69eef4ed752c2d641ed724e72110)
1#
2# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Enable version2 of image loading
8LOAD_IMAGE_V2	:=	1
9
10# On Hikey, the TSP can execute from TZC secure area in DRAM (default)
11# or SRAM.
12HIKEY_TSP_RAM_LOCATION	:=	dram
13ifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
14  HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
15else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
16  HIKEY_TSP_RAM_LOCATION_ID := HIKEY_SRAM_ID
17else
18  $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value")
19endif
20
21CONSOLE_BASE			:=	PL011_UART3_BASE
22CRASH_CONSOLE_BASE		:=	PL011_UART3_BASE
23PLAT_PARTITION_MAX_ENTRIES	:=	12
24PLAT_PL061_MAX_GPIOS		:=	160
25COLD_BOOT_SINGLE_CPU		:=	1
26PROGRAMMABLE_RESET_ADDRESS	:=	1
27ENABLE_SVE_FOR_NS		:=	0
28
29# Process flags
30$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID))
31$(eval $(call add_define,CONSOLE_BASE))
32$(eval $(call add_define,CRASH_CONSOLE_BASE))
33$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
34$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES))
35
36# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
37# in the FIP if the platform requires.
38ifneq ($(BL32_EXTRA1),)
39$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
40endif
41ifneq ($(BL32_EXTRA2),)
42$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
43endif
44
45ENABLE_PLAT_COMPAT	:=	0
46
47USE_COHERENT_MEM	:=	1
48
49PLAT_INCLUDES		:=	-Iinclude/common/tbbr			\
50				-Iinclude/drivers/synopsys		\
51				-Iplat/hisilicon/hikey/include
52
53PLAT_BL_COMMON_SOURCES	:=	drivers/arm/pl011/pl011_console.S	\
54				lib/aarch64/xlat_tables.c		\
55				plat/hisilicon/hikey/aarch64/hikey_common.c
56
57BL1_SOURCES		+=	bl1/tbbr/tbbr_img_desc.c		\
58				drivers/arm/pl061/pl061_gpio.c		\
59				drivers/arm/sp804/sp804_delay_timer.c	\
60				drivers/delay_timer/delay_timer.c	\
61				drivers/gpio/gpio.c			\
62				drivers/io/io_block.c			\
63				drivers/io/io_fip.c			\
64				drivers/io/io_storage.c			\
65				drivers/emmc/emmc.c			\
66				drivers/synopsys/emmc/dw_mmc.c		\
67				lib/cpus/aarch64/cortex_a53.S		\
68				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
69				plat/hisilicon/hikey/hikey_bl1_setup.c	\
70				plat/hisilicon/hikey/hikey_io_storage.c
71
72BL2_SOURCES		+=	drivers/arm/sp804/sp804_delay_timer.c	\
73				drivers/delay_timer/delay_timer.c	\
74				drivers/io/io_block.c			\
75				drivers/io/io_fip.c			\
76				drivers/io/io_storage.c			\
77				drivers/emmc/emmc.c			\
78				drivers/synopsys/emmc/dw_mmc.c		\
79				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
80				plat/hisilicon/hikey/hikey_bl2_setup.c	\
81				plat/hisilicon/hikey/hikey_ddr.c	\
82				plat/hisilicon/hikey/hikey_io_storage.c	\
83				plat/hisilicon/hikey/hisi_dvfs.c	\
84				plat/hisilicon/hikey/hisi_mcu.c
85
86ifeq (${LOAD_IMAGE_V2},1)
87BL2_SOURCES		+=	plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \
88				plat/hisilicon/hikey/hikey_image_load.c \
89				common/desc_image_load.c
90
91ifeq (${SPD},opteed)
92BL2_SOURCES		+=	lib/optee/optee_utils.c
93endif
94endif
95
96HIKEY_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
97				drivers/arm/gic/v2/gicv2_main.c		\
98				drivers/arm/gic/v2/gicv2_helpers.c	\
99				plat/common/plat_gicv2.c
100
101BL31_SOURCES		+=	drivers/arm/cci/cci.c			\
102				drivers/arm/sp804/sp804_delay_timer.c	\
103				drivers/delay_timer/delay_timer.c	\
104				lib/cpus/aarch64/cortex_a53.S		\
105				plat/common/aarch64/plat_psci_common.c	\
106				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
107				plat/hisilicon/hikey/hikey_bl31_setup.c	\
108				plat/hisilicon/hikey/hikey_pm.c		\
109				plat/hisilicon/hikey/hikey_topology.c	\
110				plat/hisilicon/hikey/hisi_ipc.c		\
111				plat/hisilicon/hikey/hisi_pwrc.c	\
112				plat/hisilicon/hikey/hisi_pwrc_sram.S	\
113				${HIKEY_GIC_SOURCES}
114ifeq (${ENABLE_PMF}, 1)
115BL31_SOURCES		+=	plat/hisilicon/hikey/hisi_sip_svc.c			\
116				lib/pmf/pmf_smc.c
117endif
118
119# Enable workarounds for selected Cortex-A53 errata.
120ERRATA_A53_836870		:=	1
121ERRATA_A53_843419		:=	1
122ERRATA_A53_855873		:=	1
123