1# 2# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7CONSOLE_BASE := PL011_UART3_BASE 8CRASH_CONSOLE_BASE := PL011_UART3_BASE 9PLAT_PL061_MAX_GPIOS := 160 10COLD_BOOT_SINGLE_CPU := 1 11PROGRAMMABLE_RESET_ADDRESS := 1 12 13# Process flags 14$(eval $(call add_define,CONSOLE_BASE)) 15$(eval $(call add_define,CRASH_CONSOLE_BASE)) 16$(eval $(call add_define,PLAT_PL061_MAX_GPIOS)) 17 18ENABLE_PLAT_COMPAT := 0 19 20USE_COHERENT_MEM := 1 21 22PLAT_INCLUDES := -Iinclude/common/tbbr \ 23 -Iinclude/drivers/synopsys \ 24 -Iplat/hisilicon/hikey/include 25 26PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ 27 lib/aarch64/xlat_tables.c \ 28 plat/hisilicon/hikey/aarch64/hikey_common.c 29 30BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 31 drivers/arm/pl061/pl061_gpio.c \ 32 drivers/arm/sp804/sp804_delay_timer.c \ 33 drivers/delay_timer/delay_timer.c \ 34 drivers/gpio/gpio.c \ 35 drivers/io/io_block.c \ 36 drivers/io/io_fip.c \ 37 drivers/io/io_storage.c \ 38 drivers/emmc/emmc.c \ 39 drivers/synopsys/emmc/dw_mmc.c \ 40 lib/cpus/aarch64/cortex_a53.S \ 41 plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 42 plat/hisilicon/hikey/hikey_bl1_setup.c \ 43 plat/hisilicon/hikey/hikey_io_storage.c 44