1127793daSHaojian Zhuang /* 2127793daSHaojian Zhuang * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3127793daSHaojian Zhuang * 4127793daSHaojian Zhuang * SPDX-License-Identifier: BSD-3-Clause 5127793daSHaojian Zhuang */ 6127793daSHaojian Zhuang 7*c3cf06f1SAntonio Nino Diaz #ifndef HISI_IPC_H 8*c3cf06f1SAntonio Nino Diaz #define HISI_IPC_H 9127793daSHaojian Zhuang 10127793daSHaojian Zhuang #define HISI_IPC_CORE_ACPU 0x0 11127793daSHaojian Zhuang 12127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU0_PD 10 13127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU1_PD 11 14127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU2_PD 12 15127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU3_PD 13 16127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU_PD 16 17127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU4_PD 26 18127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU5_PD 27 19127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU6_PD 28 20127793daSHaojian Zhuang #define HISI_IPC_MCU_INT_SRC_ACPU7_PD 29 21127793daSHaojian Zhuang 22127793daSHaojian Zhuang #define HISI_IPC_SEM_CPUIDLE 27 23127793daSHaojian Zhuang #define HISI_IPC_INT_SRC_NUM 32 24127793daSHaojian Zhuang 25127793daSHaojian Zhuang #define HISI_IPC_PM_ON 0 26127793daSHaojian Zhuang #define HISI_IPC_PM_OFF 1 27127793daSHaojian Zhuang 28127793daSHaojian Zhuang #define HISI_IPC_OK (0) 29127793daSHaojian Zhuang #define HISI_IPC_ERROR (-1) 30127793daSHaojian Zhuang 31127793daSHaojian Zhuang #define HISI_IPC_BASE_ADDR (0xF7510000) 32127793daSHaojian Zhuang #define HISI_IPC_CPU_RAW_INT_ADDR (0xF7510420) 33127793daSHaojian Zhuang #define HISI_IPC_ACPU_CTRL(i) (0xF7510800 + (i << 3)) 34127793daSHaojian Zhuang 35127793daSHaojian Zhuang void hisi_ipc_spin_lock(unsigned int signal); 36127793daSHaojian Zhuang void hisi_ipc_spin_unlock(unsigned int signal); 37127793daSHaojian Zhuang void hisi_ipc_cpu_on(unsigned int cpu, unsigned int cluster); 38127793daSHaojian Zhuang void hisi_ipc_cpu_off(unsigned int cpu, unsigned int cluster); 39127793daSHaojian Zhuang void hisi_ipc_cpu_suspend(unsigned int cpu, unsigned int cluster); 40127793daSHaojian Zhuang void hisi_ipc_cluster_on(unsigned int cpu, unsigned int cluster); 41127793daSHaojian Zhuang void hisi_ipc_cluster_off(unsigned int cpu, unsigned int cluster); 42127793daSHaojian Zhuang void hisi_ipc_cluster_suspend(unsigned int cpu, unsigned int cluster); 43127793daSHaojian Zhuang void hisi_ipc_psci_system_off(void); 44127793daSHaojian Zhuang int hisi_ipc_init(void); 45127793daSHaojian Zhuang 46*c3cf06f1SAntonio Nino Diaz #endif /* HISI_IPC_H */ 47