1*08b167e9SHaojian Zhuang /* 2*08b167e9SHaojian Zhuang * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*08b167e9SHaojian Zhuang * 4*08b167e9SHaojian Zhuang * SPDX-License-Identifier: BSD-3-Clause 5*08b167e9SHaojian Zhuang */ 6*08b167e9SHaojian Zhuang 7*08b167e9SHaojian Zhuang #ifndef __HI6220_PIN_H__ 8*08b167e9SHaojian Zhuang #define __HI6220_PIN_H__ 9*08b167e9SHaojian Zhuang 10*08b167e9SHaojian Zhuang #define IOMG_BASE 0xF7010000 11*08b167e9SHaojian Zhuang 12*08b167e9SHaojian Zhuang #define IOMG_SD_CLK (IOMG_BASE + 0x0C) 13*08b167e9SHaojian Zhuang #define IOMG_SD_CMD (IOMG_BASE + 0x10) 14*08b167e9SHaojian Zhuang #define IOMG_SD_DATA0 (IOMG_BASE + 0x14) 15*08b167e9SHaojian Zhuang #define IOMG_SD_DATA1 (IOMG_BASE + 0x18) 16*08b167e9SHaojian Zhuang #define IOMG_SD_DATA2 (IOMG_BASE + 0x1C) 17*08b167e9SHaojian Zhuang #define IOMG_SD_DATA3 (IOMG_BASE + 0x20) 18*08b167e9SHaojian Zhuang #define IOMG_GPIO24 (IOMG_BASE + 0x140) 19*08b167e9SHaojian Zhuang 20*08b167e9SHaojian Zhuang #define IOMG_MUX_FUNC0 0 21*08b167e9SHaojian Zhuang #define IOMG_MUX_FUNC1 1 22*08b167e9SHaojian Zhuang #define IOMG_MUX_FUNC2 2 23*08b167e9SHaojian Zhuang 24*08b167e9SHaojian Zhuang #define IOCG1_BASE 0xF7010800 25*08b167e9SHaojian Zhuang #define IOCG2_BASE 0xF8001800 26*08b167e9SHaojian Zhuang 27*08b167e9SHaojian Zhuang #define IOCG_SD_CLK (IOCG1_BASE + 0x0C) 28*08b167e9SHaojian Zhuang #define IOCG_SD_CMD (IOCG1_BASE + 0x10) 29*08b167e9SHaojian Zhuang #define IOCG_SD_DATA0 (IOCG1_BASE + 0x14) 30*08b167e9SHaojian Zhuang #define IOCG_SD_DATA1 (IOCG1_BASE + 0x18) 31*08b167e9SHaojian Zhuang #define IOCG_SD_DATA2 (IOCG1_BASE + 0x1C) 32*08b167e9SHaojian Zhuang #define IOCG_SD_DATA3 (IOCG1_BASE + 0x20) 33*08b167e9SHaojian Zhuang #define IOCG_GPIO24 (IOCG1_BASE + 0x150) 34*08b167e9SHaojian Zhuang #define IOCG_GPIO8 (IOCG2_BASE + 0x30) 35*08b167e9SHaojian Zhuang 36*08b167e9SHaojian Zhuang #define IOCG_DRIVE_8MA (2 << 4) 37*08b167e9SHaojian Zhuang #define IOCG_DRIVE_10MA (3 << 4) 38*08b167e9SHaojian Zhuang #define IOCG_INPUT_16MA 0x64 39*08b167e9SHaojian Zhuang #define IOCG_INPUT_12MA 0x54 40*08b167e9SHaojian Zhuang #define IOCG_PULLDOWN (1 << 1) 41*08b167e9SHaojian Zhuang #define IOCG_PULLUP (1 << 0) 42*08b167e9SHaojian Zhuang 43*08b167e9SHaojian Zhuang #endif /* __HI6220_PIN_H__ */ 44