xref: /rk3399_ARM-atf/plat/hisilicon/hikey/hikey_topology.c (revision 127793daba1831044fd0269931c4ea23bc378ab0)
1*127793daSHaojian Zhuang /*
2*127793daSHaojian Zhuang  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*127793daSHaojian Zhuang  *
4*127793daSHaojian Zhuang  * SPDX-License-Identifier: BSD-3-Clause
5*127793daSHaojian Zhuang  */
6*127793daSHaojian Zhuang #include <arch.h>
7*127793daSHaojian Zhuang #include <platform_def.h>
8*127793daSHaojian Zhuang #include <psci.h>
9*127793daSHaojian Zhuang 
10*127793daSHaojian Zhuang /*
11*127793daSHaojian Zhuang  * The HiKey power domain tree descriptor. The cluster power domains
12*127793daSHaojian Zhuang  * are arranged so that when the PSCI generic code creates the power
13*127793daSHaojian Zhuang  * domain tree, the indices of the CPU power domain nodes it allocates
14*127793daSHaojian Zhuang  * match the linear indices returned by plat_core_pos_by_mpidr().
15*127793daSHaojian Zhuang  */
16*127793daSHaojian Zhuang const unsigned char hikey_power_domain_tree_desc[] = {
17*127793daSHaojian Zhuang 	/* Number of root nodes */
18*127793daSHaojian Zhuang 	1,
19*127793daSHaojian Zhuang 	/* Number of clusters */
20*127793daSHaojian Zhuang 	PLATFORM_CLUSTER_COUNT,
21*127793daSHaojian Zhuang 	/* Number of CPU cores */
22*127793daSHaojian Zhuang 	PLATFORM_CORE_COUNT
23*127793daSHaojian Zhuang };
24*127793daSHaojian Zhuang 
25*127793daSHaojian Zhuang /*******************************************************************************
26*127793daSHaojian Zhuang  * This function returns the HiKey topology tree information.
27*127793daSHaojian Zhuang  ******************************************************************************/
28*127793daSHaojian Zhuang const unsigned char *plat_get_power_domain_tree_desc(void)
29*127793daSHaojian Zhuang {
30*127793daSHaojian Zhuang 	return hikey_power_domain_tree_desc;
31*127793daSHaojian Zhuang }
32*127793daSHaojian Zhuang 
33*127793daSHaojian Zhuang /*******************************************************************************
34*127793daSHaojian Zhuang  * This function implements a part of the critical interface between the psci
35*127793daSHaojian Zhuang  * generic layer and the platform that allows the former to query the platform
36*127793daSHaojian Zhuang  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
37*127793daSHaojian Zhuang  * in case the MPIDR is invalid.
38*127793daSHaojian Zhuang  ******************************************************************************/
39*127793daSHaojian Zhuang int plat_core_pos_by_mpidr(u_register_t mpidr)
40*127793daSHaojian Zhuang {
41*127793daSHaojian Zhuang 	unsigned int cluster_id, cpu_id;
42*127793daSHaojian Zhuang 
43*127793daSHaojian Zhuang 	mpidr &= MPIDR_AFFINITY_MASK;
44*127793daSHaojian Zhuang 
45*127793daSHaojian Zhuang 	if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
46*127793daSHaojian Zhuang 		return -1;
47*127793daSHaojian Zhuang 
48*127793daSHaojian Zhuang 	cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
49*127793daSHaojian Zhuang 	cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
50*127793daSHaojian Zhuang 
51*127793daSHaojian Zhuang 	if (cluster_id >= PLATFORM_CLUSTER_COUNT)
52*127793daSHaojian Zhuang 		return -1;
53*127793daSHaojian Zhuang 
54*127793daSHaojian Zhuang 	/*
55*127793daSHaojian Zhuang 	 * Validate cpu_id by checking whether it represents a CPU in
56*127793daSHaojian Zhuang 	 * one of the two clusters present on the platform.
57*127793daSHaojian Zhuang 	 */
58*127793daSHaojian Zhuang 	if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER)
59*127793daSHaojian Zhuang 		return -1;
60*127793daSHaojian Zhuang 
61*127793daSHaojian Zhuang 	return (cpu_id + (cluster_id * 4));
62*127793daSHaojian Zhuang }
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