1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <arm_gic.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <debug.h> 12 #include <mmio.h> 13 #include <platform.h> 14 #include <platform_def.h> 15 #include <xlat_tables.h> 16 17 #include "../hikey_def.h" 18 19 #define MAP_DDR MAP_REGION_FLAT(DDR_BASE, \ 20 DDR_SIZE, \ 21 MT_DEVICE | MT_RW | MT_NS) 22 23 #define MAP_DEVICE MAP_REGION_FLAT(DEVICE_BASE, \ 24 DEVICE_SIZE, \ 25 MT_DEVICE | MT_RW | MT_SECURE) 26 27 #define MAP_TSP_MEM MAP_REGION_FLAT(TSP_SEC_MEM_BASE, \ 28 TSP_SEC_MEM_SIZE, \ 29 MT_MEMORY | MT_RW | MT_SECURE) 30 31 #define MAP_ROM_PARAM MAP_REGION_FLAT(XG2RAM0_BASE, \ 32 BL1_XG2RAM0_OFFSET, \ 33 MT_DEVICE | MT_RO | MT_SECURE) 34 35 #define MAP_SRAM MAP_REGION_FLAT(SRAM_BASE, \ 36 SRAM_SIZE, \ 37 MT_DEVICE | MT_RW | MT_SECURE) 38 39 /* 40 * BL1 needs to access the areas of MMC_SRAM. 41 * BL1 loads BL2 from eMMC into SRAM before DDR initialized. 42 */ 43 #define MAP_MMC_SRAM MAP_REGION_FLAT(HIKEY_BL1_MMC_DESC_BASE, \ 44 HIKEY_BL1_MMC_DESC_SIZE + \ 45 HIKEY_BL1_MMC_DATA_SIZE, \ 46 MT_DEVICE | MT_RW | MT_SECURE) 47 48 /* 49 * Table of regions for different BL stages to map using the MMU. 50 * This doesn't include Trusted RAM as the 'mem_layout' argument passed to 51 * hikey_init_mmu_elx() will give the available subset of that, 52 */ 53 #if IMAGE_BL1 54 static const mmap_region_t hikey_mmap[] = { 55 MAP_DEVICE, 56 MAP_ROM_PARAM, 57 MAP_MMC_SRAM, 58 {0} 59 }; 60 #endif 61 62 #if IMAGE_BL2 63 static const mmap_region_t hikey_mmap[] = { 64 MAP_DDR, 65 MAP_DEVICE, 66 MAP_TSP_MEM, 67 {0} 68 }; 69 #endif 70 71 #if IMAGE_BL31 72 static const mmap_region_t hikey_mmap[] = { 73 MAP_DEVICE, 74 MAP_SRAM, 75 MAP_TSP_MEM, 76 {0} 77 }; 78 #endif 79 80 #if IMAGE_BL32 81 static const mmap_region_t hikey_mmap[] = { 82 MAP_DEVICE, 83 MAP_DDR, 84 {0} 85 }; 86 #endif 87 88 /* 89 * Macro generating the code for the function setting up the pagetables as per 90 * the platform memory map & initialize the mmu, for the given exception level 91 */ 92 #define HIKEY_CONFIGURE_MMU_EL(_el) \ 93 void hikey_init_mmu_el##_el(unsigned long total_base, \ 94 unsigned long total_size, \ 95 unsigned long ro_start, \ 96 unsigned long ro_limit, \ 97 unsigned long coh_start, \ 98 unsigned long coh_limit) \ 99 { \ 100 mmap_add_region(total_base, total_base, \ 101 total_size, \ 102 MT_MEMORY | MT_RW | MT_SECURE); \ 103 mmap_add_region(ro_start, ro_start, \ 104 ro_limit - ro_start, \ 105 MT_MEMORY | MT_RO | MT_SECURE); \ 106 mmap_add_region(coh_start, coh_start, \ 107 coh_limit - coh_start, \ 108 MT_DEVICE | MT_RW | MT_SECURE); \ 109 mmap_add(hikey_mmap); \ 110 init_xlat_tables(); \ 111 \ 112 enable_mmu_el##_el(0); \ 113 } 114 115 /* Define EL1 and EL3 variants of the function initialising the MMU */ 116 HIKEY_CONFIGURE_MMU_EL(1) 117 HIKEY_CONFIGURE_MMU_EL(3) 118 119 unsigned long plat_get_ns_image_entrypoint(void) 120 { 121 return HIKEY_NS_IMAGE_OFFSET; 122 } 123 124 unsigned int plat_get_syscnt_freq2(void) 125 { 126 return 1200000; 127 } 128