xref: /rk3399_ARM-atf/plat/hisilicon/hikey/aarch64/hikey_common.c (revision 2271cb054db6387bbb9215e09ae97a41a13aa4e3)
1 /*
2  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arch_helpers.h>
8 #include <arm_gic.h>
9 #include <assert.h>
10 #include <bl_common.h>
11 #include <debug.h>
12 #include <hikey_def.h>
13 #include <hikey_layout.h>
14 #include <mmio.h>
15 #include <platform.h>
16 #include <xlat_tables.h>
17 
18 #define MAP_DDR		MAP_REGION_FLAT(DDR_BASE,			\
19 					DDR_SIZE - DDR_SEC_SIZE,	\
20 					MT_DEVICE | MT_RW | MT_NS)
21 
22 #define MAP_DEVICE	MAP_REGION_FLAT(DEVICE_BASE,			\
23 					DEVICE_SIZE,			\
24 					MT_DEVICE | MT_RW | MT_SECURE)
25 
26 #define MAP_TSP_MEM	MAP_REGION_FLAT(TSP_SEC_MEM_BASE,		\
27 					TSP_SEC_MEM_SIZE,		\
28 					MT_MEMORY | MT_RW | MT_SECURE)
29 
30 #define MAP_ROM_PARAM	MAP_REGION_FLAT(XG2RAM0_BASE,			\
31 					BL1_XG2RAM0_OFFSET,		\
32 					MT_DEVICE | MT_RO | MT_SECURE)
33 
34 #define MAP_SRAM	MAP_REGION_FLAT(SRAM_BASE,			\
35 					SRAM_SIZE,			\
36 					MT_DEVICE | MT_RW | MT_SECURE)
37 
38 /*
39  * BL1 needs to access the areas of MMC_SRAM.
40  * BL1 loads BL2 from eMMC into SRAM before DDR initialized.
41  */
42 #define MAP_MMC_SRAM	MAP_REGION_FLAT(HIKEY_BL1_MMC_DESC_BASE,	\
43 					HIKEY_BL1_MMC_DESC_SIZE +	\
44 					HIKEY_BL1_MMC_DATA_SIZE,	\
45 					MT_DEVICE | MT_RW | MT_SECURE)
46 
47 /*
48  * Table of regions for different BL stages to map using the MMU.
49  * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
50  * hikey_init_mmu_elx() will give the available subset of that,
51  */
52 #ifdef IMAGE_BL1
53 static const mmap_region_t hikey_mmap[] = {
54 	MAP_DEVICE,
55 	MAP_ROM_PARAM,
56 	MAP_MMC_SRAM,
57 	{0}
58 };
59 #endif
60 
61 #ifdef IMAGE_BL2
62 static const mmap_region_t hikey_mmap[] = {
63 	MAP_DDR,
64 	MAP_DEVICE,
65 	MAP_TSP_MEM,
66 	MAP_SRAM,
67 	{0}
68 };
69 #endif
70 
71 #ifdef IMAGE_BL31
72 static const mmap_region_t hikey_mmap[] = {
73 	MAP_DEVICE,
74 	MAP_SRAM,
75 	MAP_TSP_MEM,
76 	{0}
77 };
78 #endif
79 
80 #ifdef IMAGE_BL32
81 static const mmap_region_t hikey_mmap[] = {
82 	MAP_DEVICE,
83 	MAP_DDR,
84 	{0}
85 };
86 #endif
87 
88 /*
89  * Macro generating the code for the function setting up the pagetables as per
90  * the platform memory map & initialize the mmu, for the given exception level
91  */
92 #define HIKEY_CONFIGURE_MMU_EL(_el)				\
93 	void hikey_init_mmu_el##_el(unsigned long total_base,	\
94 				  unsigned long total_size,	\
95 				  unsigned long ro_start,	\
96 				  unsigned long ro_limit,	\
97 				  unsigned long coh_start,	\
98 				  unsigned long coh_limit)	\
99 	{							\
100 	       mmap_add_region(total_base, total_base,		\
101 			       total_size,			\
102 			       MT_MEMORY | MT_RW | MT_SECURE);	\
103 	       mmap_add_region(ro_start, ro_start,		\
104 			       ro_limit - ro_start,		\
105 			       MT_MEMORY | MT_RO | MT_SECURE);	\
106 	       mmap_add_region(coh_start, coh_start,		\
107 			       coh_limit - coh_start,		\
108 			       MT_DEVICE | MT_RW | MT_SECURE);	\
109 	       mmap_add(hikey_mmap);				\
110 	       init_xlat_tables();				\
111 								\
112 	       enable_mmu_el##_el(0);				\
113 	}
114 
115 /* Define EL1 and EL3 variants of the function initialising the MMU */
116 HIKEY_CONFIGURE_MMU_EL(1)
117 HIKEY_CONFIGURE_MMU_EL(3)
118 
119 unsigned long plat_get_ns_image_entrypoint(void)
120 {
121 	return HIKEY_NS_IMAGE_OFFSET;
122 }
123 
124 unsigned int plat_get_syscnt_freq2(void)
125 {
126 	return 1200000;
127 }
128