1 /* 2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <arch_helpers.h> 7 #include <assert.h> 8 #include <bl_common.h> 9 #include <cassert.h> 10 #include <gic_common.h> 11 #include <gicv3.h> 12 #include <interrupt_mgmt.h> 13 #include <platform.h> 14 15 #ifdef IMAGE_BL31 16 17 /* 18 * The following platform GIC functions are weakly defined. They 19 * provide typical implementations that may be re-used by multiple 20 * platforms but may also be overridden by a platform if required. 21 */ 22 #pragma weak plat_ic_get_pending_interrupt_id 23 #pragma weak plat_ic_get_pending_interrupt_type 24 #pragma weak plat_ic_acknowledge_interrupt 25 #pragma weak plat_ic_get_interrupt_type 26 #pragma weak plat_ic_end_of_interrupt 27 #pragma weak plat_interrupt_type_to_line 28 29 #pragma weak plat_ic_get_running_priority 30 #pragma weak plat_ic_is_spi 31 #pragma weak plat_ic_is_ppi 32 #pragma weak plat_ic_is_sgi 33 #pragma weak plat_ic_get_interrupt_active 34 35 CASSERT((INTR_TYPE_S_EL1 == INTR_GROUP1S) && 36 (INTR_TYPE_NS == INTR_GROUP1NS) && 37 (INTR_TYPE_EL3 == INTR_GROUP0), assert_interrupt_type_mismatch); 38 39 /* 40 * This function returns the highest priority pending interrupt at 41 * the Interrupt controller 42 */ 43 uint32_t plat_ic_get_pending_interrupt_id(void) 44 { 45 unsigned int irqnr; 46 47 assert(IS_IN_EL3()); 48 irqnr = gicv3_get_pending_interrupt_id(); 49 return (gicv3_is_intr_id_special_identifier(irqnr)) ? 50 INTR_ID_UNAVAILABLE : irqnr; 51 } 52 53 /* 54 * This function returns the type of the highest priority pending interrupt 55 * at the Interrupt controller. In the case of GICv3, the Highest Priority 56 * Pending interrupt system register (`ICC_HPPIR0_EL1`) is read to determine 57 * the id of the pending interrupt. The type of interrupt depends upon the 58 * id value as follows. 59 * 1. id = PENDING_G1S_INTID (1020) is reported as a S-EL1 interrupt 60 * 2. id = PENDING_G1NS_INTID (1021) is reported as a Non-secure interrupt. 61 * 3. id = GIC_SPURIOUS_INTERRUPT (1023) is reported as an invalid interrupt 62 * type. 63 * 4. All other interrupt id's are reported as EL3 interrupt. 64 */ 65 uint32_t plat_ic_get_pending_interrupt_type(void) 66 { 67 unsigned int irqnr; 68 69 assert(IS_IN_EL3()); 70 irqnr = gicv3_get_pending_interrupt_type(); 71 72 switch (irqnr) { 73 case PENDING_G1S_INTID: 74 return INTR_TYPE_S_EL1; 75 case PENDING_G1NS_INTID: 76 return INTR_TYPE_NS; 77 case GIC_SPURIOUS_INTERRUPT: 78 return INTR_TYPE_INVAL; 79 default: 80 return INTR_TYPE_EL3; 81 } 82 } 83 84 /* 85 * This function returns the highest priority pending interrupt at 86 * the Interrupt controller and indicates to the Interrupt controller 87 * that the interrupt processing has started. 88 */ 89 uint32_t plat_ic_acknowledge_interrupt(void) 90 { 91 assert(IS_IN_EL3()); 92 return gicv3_acknowledge_interrupt(); 93 } 94 95 /* 96 * This function returns the type of the interrupt `id`, depending on how 97 * the interrupt has been configured in the interrupt controller 98 */ 99 uint32_t plat_ic_get_interrupt_type(uint32_t id) 100 { 101 assert(IS_IN_EL3()); 102 return gicv3_get_interrupt_type(id, plat_my_core_pos()); 103 } 104 105 /* 106 * This functions is used to indicate to the interrupt controller that 107 * the processing of the interrupt corresponding to the `id` has 108 * finished. 109 */ 110 void plat_ic_end_of_interrupt(uint32_t id) 111 { 112 assert(IS_IN_EL3()); 113 gicv3_end_of_interrupt(id); 114 } 115 116 /* 117 * An ARM processor signals interrupt exceptions through the IRQ and FIQ pins. 118 * The interrupt controller knows which pin/line it uses to signal a type of 119 * interrupt. It lets the interrupt management framework determine for a type of 120 * interrupt and security state, which line should be used in the SCR_EL3 to 121 * control its routing to EL3. The interrupt line is represented as the bit 122 * position of the IRQ or FIQ bit in the SCR_EL3. 123 */ 124 uint32_t plat_interrupt_type_to_line(uint32_t type, 125 uint32_t security_state) 126 { 127 assert(type == INTR_TYPE_S_EL1 || 128 type == INTR_TYPE_EL3 || 129 type == INTR_TYPE_NS); 130 131 assert(sec_state_is_valid(security_state)); 132 assert(IS_IN_EL3()); 133 134 switch (type) { 135 case INTR_TYPE_S_EL1: 136 /* 137 * The S-EL1 interrupts are signaled as IRQ in S-EL0/1 contexts 138 * and as FIQ in the NS-EL0/1/2 contexts 139 */ 140 if (security_state == SECURE) 141 return __builtin_ctz(SCR_IRQ_BIT); 142 else 143 return __builtin_ctz(SCR_FIQ_BIT); 144 case INTR_TYPE_NS: 145 /* 146 * The Non secure interrupts will be signaled as FIQ in S-EL0/1 147 * contexts and as IRQ in the NS-EL0/1/2 contexts. 148 */ 149 if (security_state == SECURE) 150 return __builtin_ctz(SCR_FIQ_BIT); 151 else 152 return __builtin_ctz(SCR_IRQ_BIT); 153 default: 154 assert(0); 155 /* Fall through in the release build */ 156 case INTR_TYPE_EL3: 157 /* 158 * The EL3 interrupts are signaled as FIQ in both S-EL0/1 and 159 * NS-EL0/1/2 contexts 160 */ 161 return __builtin_ctz(SCR_FIQ_BIT); 162 } 163 } 164 165 unsigned int plat_ic_get_running_priority(void) 166 { 167 return gicv3_get_running_priority(); 168 } 169 170 int plat_ic_is_spi(unsigned int id) 171 { 172 return (id >= MIN_SPI_ID) && (id <= MAX_SPI_ID); 173 } 174 175 int plat_ic_is_ppi(unsigned int id) 176 { 177 return (id >= MIN_PPI_ID) && (id < MIN_SPI_ID); 178 } 179 180 int plat_ic_is_sgi(unsigned int id) 181 { 182 return (id >= MIN_SGI_ID) && (id < MIN_PPI_ID); 183 } 184 185 unsigned int plat_ic_get_interrupt_active(unsigned int id) 186 { 187 return gicv3_get_interrupt_active(id, plat_my_core_pos()); 188 } 189 #endif 190 #ifdef IMAGE_BL32 191 192 #pragma weak plat_ic_get_pending_interrupt_id 193 #pragma weak plat_ic_acknowledge_interrupt 194 #pragma weak plat_ic_end_of_interrupt 195 196 /* In AArch32, the secure group1 interrupts are targeted to Secure PL1 */ 197 #ifdef AARCH32 198 #define IS_IN_EL1() IS_IN_SECURE() 199 #endif 200 201 /* 202 * This function returns the highest priority pending interrupt at 203 * the Interrupt controller 204 */ 205 uint32_t plat_ic_get_pending_interrupt_id(void) 206 { 207 unsigned int irqnr; 208 209 assert(IS_IN_EL1()); 210 irqnr = gicv3_get_pending_interrupt_id_sel1(); 211 return (irqnr == GIC_SPURIOUS_INTERRUPT) ? 212 INTR_ID_UNAVAILABLE : irqnr; 213 } 214 215 /* 216 * This function returns the highest priority pending interrupt at 217 * the Interrupt controller and indicates to the Interrupt controller 218 * that the interrupt processing has started. 219 */ 220 uint32_t plat_ic_acknowledge_interrupt(void) 221 { 222 assert(IS_IN_EL1()); 223 return gicv3_acknowledge_interrupt_sel1(); 224 } 225 226 /* 227 * This functions is used to indicate to the interrupt controller that 228 * the processing of the interrupt corresponding to the `id` has 229 * finished. 230 */ 231 void plat_ic_end_of_interrupt(uint32_t id) 232 { 233 assert(IS_IN_EL1()); 234 gicv3_end_of_interrupt_sel1(id); 235 } 236 #endif 237