1 /* 2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <assert.h> 7 #include <gic_common.h> 8 #include <gicv2.h> 9 #include <interrupt_mgmt.h> 10 11 /* 12 * The following platform GIC functions are weakly defined. They 13 * provide typical implementations that may be re-used by multiple 14 * platforms but may also be overridden by a platform if required. 15 */ 16 #pragma weak plat_ic_get_pending_interrupt_id 17 #pragma weak plat_ic_get_pending_interrupt_type 18 #pragma weak plat_ic_acknowledge_interrupt 19 #pragma weak plat_ic_get_interrupt_type 20 #pragma weak plat_ic_end_of_interrupt 21 #pragma weak plat_interrupt_type_to_line 22 23 #pragma weak plat_ic_get_running_priority 24 #pragma weak plat_ic_is_spi 25 #pragma weak plat_ic_is_ppi 26 #pragma weak plat_ic_is_sgi 27 #pragma weak plat_ic_get_interrupt_active 28 #pragma weak plat_ic_enable_interrupt 29 #pragma weak plat_ic_disable_interrupt 30 #pragma weak plat_ic_set_interrupt_priority 31 #pragma weak plat_ic_set_interrupt_type 32 33 /* 34 * This function returns the highest priority pending interrupt at 35 * the Interrupt controller 36 */ 37 uint32_t plat_ic_get_pending_interrupt_id(void) 38 { 39 unsigned int id; 40 41 id = gicv2_get_pending_interrupt_id(); 42 if (id == GIC_SPURIOUS_INTERRUPT) 43 return INTR_ID_UNAVAILABLE; 44 45 return id; 46 } 47 48 /* 49 * This function returns the type of the highest priority pending interrupt 50 * at the Interrupt controller. In the case of GICv2, the Highest Priority 51 * Pending interrupt register (`GICC_HPPIR`) is read to determine the id of 52 * the pending interrupt. The type of interrupt depends upon the id value 53 * as follows. 54 * 1. id < PENDING_G1_INTID (1022) is reported as a S-EL1 interrupt 55 * 2. id = PENDING_G1_INTID (1022) is reported as a Non-secure interrupt. 56 * 3. id = GIC_SPURIOUS_INTERRUPT (1023) is reported as an invalid interrupt 57 * type. 58 */ 59 uint32_t plat_ic_get_pending_interrupt_type(void) 60 { 61 unsigned int id; 62 63 id = gicv2_get_pending_interrupt_type(); 64 65 /* Assume that all secure interrupts are S-EL1 interrupts */ 66 if (id < PENDING_G1_INTID) { 67 #if GICV2_G0_FOR_EL3 68 return INTR_TYPE_EL3; 69 #else 70 return INTR_TYPE_S_EL1; 71 #endif 72 } 73 74 if (id == GIC_SPURIOUS_INTERRUPT) 75 return INTR_TYPE_INVAL; 76 77 return INTR_TYPE_NS; 78 } 79 80 /* 81 * This function returns the highest priority pending interrupt at 82 * the Interrupt controller and indicates to the Interrupt controller 83 * that the interrupt processing has started. 84 */ 85 uint32_t plat_ic_acknowledge_interrupt(void) 86 { 87 return gicv2_acknowledge_interrupt(); 88 } 89 90 /* 91 * This function returns the type of the interrupt `id`, depending on how 92 * the interrupt has been configured in the interrupt controller 93 */ 94 uint32_t plat_ic_get_interrupt_type(uint32_t id) 95 { 96 unsigned int type; 97 98 type = gicv2_get_interrupt_group(id); 99 100 /* Assume that all secure interrupts are S-EL1 interrupts */ 101 return type == GICV2_INTR_GROUP1 ? INTR_TYPE_NS : 102 #if GICV2_G0_FOR_EL3 103 INTR_TYPE_EL3; 104 #else 105 INTR_TYPE_S_EL1; 106 #endif 107 } 108 109 /* 110 * This functions is used to indicate to the interrupt controller that 111 * the processing of the interrupt corresponding to the `id` has 112 * finished. 113 */ 114 void plat_ic_end_of_interrupt(uint32_t id) 115 { 116 gicv2_end_of_interrupt(id); 117 } 118 119 /* 120 * An ARM processor signals interrupt exceptions through the IRQ and FIQ pins. 121 * The interrupt controller knows which pin/line it uses to signal a type of 122 * interrupt. It lets the interrupt management framework determine 123 * for a type of interrupt and security state, which line should be used in the 124 * SCR_EL3 to control its routing to EL3. The interrupt line is represented 125 * as the bit position of the IRQ or FIQ bit in the SCR_EL3. 126 */ 127 uint32_t plat_interrupt_type_to_line(uint32_t type, 128 uint32_t security_state) 129 { 130 assert(type == INTR_TYPE_S_EL1 || 131 type == INTR_TYPE_EL3 || 132 type == INTR_TYPE_NS); 133 134 /* Non-secure interrupts are signaled on the IRQ line always */ 135 if (type == INTR_TYPE_NS) 136 return __builtin_ctz(SCR_IRQ_BIT); 137 138 /* 139 * Secure interrupts are signaled using the IRQ line if the FIQ is 140 * not enabled else they are signaled using the FIQ line. 141 */ 142 return ((gicv2_is_fiq_enabled()) ? __builtin_ctz(SCR_FIQ_BIT) : 143 __builtin_ctz(SCR_IRQ_BIT)); 144 } 145 146 unsigned int plat_ic_get_running_priority(void) 147 { 148 return gicv2_get_running_priority(); 149 } 150 151 int plat_ic_is_spi(unsigned int id) 152 { 153 return (id >= MIN_SPI_ID) && (id <= MAX_SPI_ID); 154 } 155 156 int plat_ic_is_ppi(unsigned int id) 157 { 158 return (id >= MIN_PPI_ID) && (id < MIN_SPI_ID); 159 } 160 161 int plat_ic_is_sgi(unsigned int id) 162 { 163 return (id >= MIN_SGI_ID) && (id < MIN_PPI_ID); 164 } 165 166 unsigned int plat_ic_get_interrupt_active(unsigned int id) 167 { 168 return gicv2_get_interrupt_active(id); 169 } 170 171 void plat_ic_enable_interrupt(unsigned int id) 172 { 173 gicv2_enable_interrupt(id); 174 } 175 176 void plat_ic_disable_interrupt(unsigned int id) 177 { 178 gicv2_disable_interrupt(id); 179 } 180 181 void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority) 182 { 183 gicv2_set_interrupt_priority(id, priority); 184 } 185 186 int plat_ic_has_interrupt_type(unsigned int type) 187 { 188 switch (type) { 189 #if GICV2_G0_FOR_EL3 190 case INTR_TYPE_EL3: 191 #else 192 case INTR_TYPE_S_EL1: 193 #endif 194 case INTR_TYPE_NS: 195 return 1; 196 default: 197 return 0; 198 } 199 } 200 201 void plat_ic_set_interrupt_type(unsigned int id, unsigned int type) 202 { 203 int gicv2_type = 0; 204 205 /* Map canonical interrupt type to GICv2 type */ 206 switch (type) { 207 #if GICV2_G0_FOR_EL3 208 case INTR_TYPE_EL3: 209 #else 210 case INTR_TYPE_S_EL1: 211 #endif 212 gicv2_type = GICV2_INTR_GROUP0; 213 break; 214 case INTR_TYPE_NS: 215 gicv2_type = GICV2_INTR_GROUP1; 216 break; 217 default: 218 assert(0); 219 } 220 221 gicv2_set_interrupt_type(id, gicv2_type); 222 } 223