1f14d1886SSoby Mathew /* 2eb68ea9bSJeenu Viswambharan * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3f14d1886SSoby Mathew * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5f14d1886SSoby Mathew */ 6f14d1886SSoby Mathew #include <assert.h> 7f14d1886SSoby Mathew #include <gic_common.h> 8f14d1886SSoby Mathew #include <gicv2.h> 9f14d1886SSoby Mathew #include <interrupt_mgmt.h> 10f14d1886SSoby Mathew 11f14d1886SSoby Mathew /* 12f14d1886SSoby Mathew * The following platform GIC functions are weakly defined. They 13f14d1886SSoby Mathew * provide typical implementations that may be re-used by multiple 14f14d1886SSoby Mathew * platforms but may also be overridden by a platform if required. 15f14d1886SSoby Mathew */ 16f14d1886SSoby Mathew #pragma weak plat_ic_get_pending_interrupt_id 17f14d1886SSoby Mathew #pragma weak plat_ic_get_pending_interrupt_type 18f14d1886SSoby Mathew #pragma weak plat_ic_acknowledge_interrupt 19f14d1886SSoby Mathew #pragma weak plat_ic_get_interrupt_type 20f14d1886SSoby Mathew #pragma weak plat_ic_end_of_interrupt 21f14d1886SSoby Mathew #pragma weak plat_interrupt_type_to_line 22f14d1886SSoby Mathew 23eb68ea9bSJeenu Viswambharan #pragma weak plat_ic_get_running_priority 24ca43b55dSJeenu Viswambharan #pragma weak plat_ic_is_spi 25ca43b55dSJeenu Viswambharan #pragma weak plat_ic_is_ppi 26ca43b55dSJeenu Viswambharan #pragma weak plat_ic_is_sgi 27cbd3f370SJeenu Viswambharan #pragma weak plat_ic_get_interrupt_active 28*979225f4SJeenu Viswambharan #pragma weak plat_ic_enable_interrupt 29*979225f4SJeenu Viswambharan #pragma weak plat_ic_disable_interrupt 30eb68ea9bSJeenu Viswambharan 31f14d1886SSoby Mathew /* 32f14d1886SSoby Mathew * This function returns the highest priority pending interrupt at 33f14d1886SSoby Mathew * the Interrupt controller 34f14d1886SSoby Mathew */ 35f14d1886SSoby Mathew uint32_t plat_ic_get_pending_interrupt_id(void) 36f14d1886SSoby Mathew { 37f14d1886SSoby Mathew unsigned int id; 38f14d1886SSoby Mathew 39f14d1886SSoby Mathew id = gicv2_get_pending_interrupt_id(); 40f14d1886SSoby Mathew if (id == GIC_SPURIOUS_INTERRUPT) 41f14d1886SSoby Mathew return INTR_ID_UNAVAILABLE; 42f14d1886SSoby Mathew 43f14d1886SSoby Mathew return id; 44f14d1886SSoby Mathew } 45f14d1886SSoby Mathew 46f14d1886SSoby Mathew /* 47f14d1886SSoby Mathew * This function returns the type of the highest priority pending interrupt 48f14d1886SSoby Mathew * at the Interrupt controller. In the case of GICv2, the Highest Priority 49f14d1886SSoby Mathew * Pending interrupt register (`GICC_HPPIR`) is read to determine the id of 50f14d1886SSoby Mathew * the pending interrupt. The type of interrupt depends upon the id value 51f14d1886SSoby Mathew * as follows. 52f14d1886SSoby Mathew * 1. id < PENDING_G1_INTID (1022) is reported as a S-EL1 interrupt 53f14d1886SSoby Mathew * 2. id = PENDING_G1_INTID (1022) is reported as a Non-secure interrupt. 54f14d1886SSoby Mathew * 3. id = GIC_SPURIOUS_INTERRUPT (1023) is reported as an invalid interrupt 55f14d1886SSoby Mathew * type. 56f14d1886SSoby Mathew */ 57f14d1886SSoby Mathew uint32_t plat_ic_get_pending_interrupt_type(void) 58f14d1886SSoby Mathew { 59f14d1886SSoby Mathew unsigned int id; 60f14d1886SSoby Mathew 61f14d1886SSoby Mathew id = gicv2_get_pending_interrupt_type(); 62f14d1886SSoby Mathew 63f14d1886SSoby Mathew /* Assume that all secure interrupts are S-EL1 interrupts */ 64f14d1886SSoby Mathew if (id < PENDING_G1_INTID) 65f14d1886SSoby Mathew return INTR_TYPE_S_EL1; 66f14d1886SSoby Mathew 67f14d1886SSoby Mathew if (id == GIC_SPURIOUS_INTERRUPT) 68f14d1886SSoby Mathew return INTR_TYPE_INVAL; 69f14d1886SSoby Mathew 70f14d1886SSoby Mathew return INTR_TYPE_NS; 71f14d1886SSoby Mathew } 72f14d1886SSoby Mathew 73f14d1886SSoby Mathew /* 74f14d1886SSoby Mathew * This function returns the highest priority pending interrupt at 75f14d1886SSoby Mathew * the Interrupt controller and indicates to the Interrupt controller 76f14d1886SSoby Mathew * that the interrupt processing has started. 77f14d1886SSoby Mathew */ 78f14d1886SSoby Mathew uint32_t plat_ic_acknowledge_interrupt(void) 79f14d1886SSoby Mathew { 80f14d1886SSoby Mathew return gicv2_acknowledge_interrupt(); 81f14d1886SSoby Mathew } 82f14d1886SSoby Mathew 83f14d1886SSoby Mathew /* 84f14d1886SSoby Mathew * This function returns the type of the interrupt `id`, depending on how 85f14d1886SSoby Mathew * the interrupt has been configured in the interrupt controller 86f14d1886SSoby Mathew */ 87f14d1886SSoby Mathew uint32_t plat_ic_get_interrupt_type(uint32_t id) 88f14d1886SSoby Mathew { 89f14d1886SSoby Mathew unsigned int type; 90f14d1886SSoby Mathew 91f14d1886SSoby Mathew type = gicv2_get_interrupt_group(id); 92f14d1886SSoby Mathew 93f14d1886SSoby Mathew /* Assume that all secure interrupts are S-EL1 interrupts */ 94f14d1886SSoby Mathew return (type) ? INTR_TYPE_NS : INTR_TYPE_S_EL1; 95f14d1886SSoby Mathew } 96f14d1886SSoby Mathew 97f14d1886SSoby Mathew /* 98f14d1886SSoby Mathew * This functions is used to indicate to the interrupt controller that 99f14d1886SSoby Mathew * the processing of the interrupt corresponding to the `id` has 100f14d1886SSoby Mathew * finished. 101f14d1886SSoby Mathew */ 102f14d1886SSoby Mathew void plat_ic_end_of_interrupt(uint32_t id) 103f14d1886SSoby Mathew { 104f14d1886SSoby Mathew gicv2_end_of_interrupt(id); 105f14d1886SSoby Mathew } 106f14d1886SSoby Mathew 107f14d1886SSoby Mathew /* 108f14d1886SSoby Mathew * An ARM processor signals interrupt exceptions through the IRQ and FIQ pins. 109f14d1886SSoby Mathew * The interrupt controller knows which pin/line it uses to signal a type of 110f14d1886SSoby Mathew * interrupt. It lets the interrupt management framework determine 111f14d1886SSoby Mathew * for a type of interrupt and security state, which line should be used in the 112f14d1886SSoby Mathew * SCR_EL3 to control its routing to EL3. The interrupt line is represented 113f14d1886SSoby Mathew * as the bit position of the IRQ or FIQ bit in the SCR_EL3. 114f14d1886SSoby Mathew */ 115f14d1886SSoby Mathew uint32_t plat_interrupt_type_to_line(uint32_t type, 116f14d1886SSoby Mathew uint32_t security_state) 117f14d1886SSoby Mathew { 118f14d1886SSoby Mathew assert(type == INTR_TYPE_S_EL1 || 119f14d1886SSoby Mathew type == INTR_TYPE_EL3 || 120f14d1886SSoby Mathew type == INTR_TYPE_NS); 121f14d1886SSoby Mathew 122f14d1886SSoby Mathew /* Non-secure interrupts are signaled on the IRQ line always */ 123f14d1886SSoby Mathew if (type == INTR_TYPE_NS) 124f14d1886SSoby Mathew return __builtin_ctz(SCR_IRQ_BIT); 125f14d1886SSoby Mathew 126f14d1886SSoby Mathew /* 127f14d1886SSoby Mathew * Secure interrupts are signaled using the IRQ line if the FIQ is 128f14d1886SSoby Mathew * not enabled else they are signaled using the FIQ line. 129f14d1886SSoby Mathew */ 130f14d1886SSoby Mathew return ((gicv2_is_fiq_enabled()) ? __builtin_ctz(SCR_FIQ_BIT) : 131f14d1886SSoby Mathew __builtin_ctz(SCR_IRQ_BIT)); 132f14d1886SSoby Mathew } 133eb68ea9bSJeenu Viswambharan 134eb68ea9bSJeenu Viswambharan unsigned int plat_ic_get_running_priority(void) 135eb68ea9bSJeenu Viswambharan { 136eb68ea9bSJeenu Viswambharan return gicv2_get_running_priority(); 137eb68ea9bSJeenu Viswambharan } 138ca43b55dSJeenu Viswambharan 139ca43b55dSJeenu Viswambharan int plat_ic_is_spi(unsigned int id) 140ca43b55dSJeenu Viswambharan { 141ca43b55dSJeenu Viswambharan return (id >= MIN_SPI_ID) && (id <= MAX_SPI_ID); 142ca43b55dSJeenu Viswambharan } 143ca43b55dSJeenu Viswambharan 144ca43b55dSJeenu Viswambharan int plat_ic_is_ppi(unsigned int id) 145ca43b55dSJeenu Viswambharan { 146ca43b55dSJeenu Viswambharan return (id >= MIN_PPI_ID) && (id < MIN_SPI_ID); 147ca43b55dSJeenu Viswambharan } 148ca43b55dSJeenu Viswambharan 149ca43b55dSJeenu Viswambharan int plat_ic_is_sgi(unsigned int id) 150ca43b55dSJeenu Viswambharan { 151ca43b55dSJeenu Viswambharan return (id >= MIN_SGI_ID) && (id < MIN_PPI_ID); 152ca43b55dSJeenu Viswambharan } 153cbd3f370SJeenu Viswambharan 154cbd3f370SJeenu Viswambharan unsigned int plat_ic_get_interrupt_active(unsigned int id) 155cbd3f370SJeenu Viswambharan { 156cbd3f370SJeenu Viswambharan return gicv2_get_interrupt_active(id); 157cbd3f370SJeenu Viswambharan } 158*979225f4SJeenu Viswambharan 159*979225f4SJeenu Viswambharan void plat_ic_enable_interrupt(unsigned int id) 160*979225f4SJeenu Viswambharan { 161*979225f4SJeenu Viswambharan gicv2_enable_interrupt(id); 162*979225f4SJeenu Viswambharan } 163*979225f4SJeenu Viswambharan 164*979225f4SJeenu Viswambharan void plat_ic_disable_interrupt(unsigned int id) 165*979225f4SJeenu Viswambharan { 166*979225f4SJeenu Viswambharan gicv2_disable_interrupt(id); 167*979225f4SJeenu Viswambharan } 168