1/* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <console.h> 10#include <platform_def.h> 11 12 .weak plat_report_exception 13 .weak plat_crash_console_init 14 .weak plat_crash_console_putc 15 .weak plat_crash_console_flush 16 .weak plat_reset_handler 17 .weak plat_disable_acp 18 .weak bl1_plat_prepare_exit 19 .weak plat_panic_handler 20 .weak bl31_plat_enable_mmu 21 .weak bl32_plat_enable_mmu 22 23 .weak plat_handle_uncontainable_ea 24 .weak plat_handle_double_fault 25 26#if !ENABLE_PLAT_COMPAT 27 .globl platform_get_core_pos 28 29#define MPIDR_RES_BIT_MASK 0xff000000 30 31 /* ------------------------------------------------------------------ 32 * int platform_get_core_pos(int mpidr) 33 * Returns the CPU index of the CPU specified by mpidr. This is 34 * defined when platform compatibility is disabled to enable Trusted 35 * Firmware components like SPD using the old platform API to work. 36 * This API is deprecated and it assumes that the mpidr specified is 37 * that of a valid and present CPU. Instead, plat_my_core_pos() 38 * should be used for CPU index of the current CPU and 39 * plat_core_pos_by_mpidr() should be used for CPU index of a 40 * CPU specified by its mpidr. 41 * ------------------------------------------------------------------ 42 */ 43func_deprecated platform_get_core_pos 44 bic x0, x0, #MPIDR_RES_BIT_MASK 45 mrs x1, mpidr_el1 46 bic x1, x1, #MPIDR_RES_BIT_MASK 47 cmp x0, x1 48 beq plat_my_core_pos 49 b platform_core_pos_helper 50endfunc_deprecated platform_get_core_pos 51#endif 52 53 /* ----------------------------------------------------- 54 * Placeholder function which should be redefined by 55 * each platform. 56 * ----------------------------------------------------- 57 */ 58func plat_report_exception 59 ret 60endfunc plat_report_exception 61 62#if MULTI_CONSOLE_API 63 /* ----------------------------------------------------- 64 * int plat_crash_console_init(void) 65 * Use normal console by default. Switch it to crash 66 * mode so serial consoles become active again. 67 * NOTE: This default implementation will only work for 68 * crashes that occur after a normal console (marked 69 * valid for the crash state) has been registered with 70 * the console framework. To debug crashes that occur 71 * earlier, the platform has to override these functions 72 * with an implementation that initializes a console 73 * driver with hardcoded parameters. See 74 * docs/porting-guide.rst for more information. 75 * ----------------------------------------------------- 76 */ 77func plat_crash_console_init 78#if defined(IMAGE_BL1) 79 /* 80 * BL1 code can possibly crash so early that the data segment is not yet 81 * accessible. Don't risk undefined behavior by trying to run the normal 82 * console framework. Platforms that want to debug BL1 will need to 83 * override this with custom functions that can run from registers only. 84 */ 85 mov x0, #0 86 ret 87#else /* IMAGE_BL1 */ 88 mov x3, x30 89 mov x0, #CONSOLE_FLAG_CRASH 90 bl console_switch_state 91 mov x0, #1 92 ret x3 93#endif 94endfunc plat_crash_console_init 95 96 /* ----------------------------------------------------- 97 * void plat_crash_console_putc(int character) 98 * Output through the normal console by default. 99 * ----------------------------------------------------- 100 */ 101func plat_crash_console_putc 102 b console_putc 103endfunc plat_crash_console_putc 104 105 /* ----------------------------------------------------- 106 * void plat_crash_console_flush(void) 107 * Flush normal console by default. 108 * ----------------------------------------------------- 109 */ 110func plat_crash_console_flush 111 b console_flush 112endfunc plat_crash_console_flush 113 114#else /* MULTI_CONSOLE_API */ 115 116 /* ----------------------------------------------------- 117 * In the old API these are all no-op stubs that need to 118 * be overridden by the platform to be useful. 119 * ----------------------------------------------------- 120 */ 121func plat_crash_console_init 122 mov x0, #0 123 ret 124endfunc plat_crash_console_init 125 126func plat_crash_console_putc 127 ret 128endfunc plat_crash_console_putc 129 130func plat_crash_console_flush 131 ret 132endfunc plat_crash_console_flush 133#endif 134 135 /* ----------------------------------------------------- 136 * Placeholder function which should be redefined by 137 * each platform. This function should preserve x19 - x29. 138 * ----------------------------------------------------- 139 */ 140func plat_reset_handler 141 ret 142endfunc plat_reset_handler 143 144 /* ----------------------------------------------------- 145 * Placeholder function which should be redefined by 146 * each platform. This function is allowed to use 147 * registers x0 - x17. 148 * ----------------------------------------------------- 149 */ 150func plat_disable_acp 151 ret 152endfunc plat_disable_acp 153 154 /* ----------------------------------------------------- 155 * void bl1_plat_prepare_exit(entry_point_info_t *ep_info); 156 * Called before exiting BL1. Default: do nothing 157 * ----------------------------------------------------- 158 */ 159func bl1_plat_prepare_exit 160 ret 161endfunc bl1_plat_prepare_exit 162 163 /* ----------------------------------------------------- 164 * void plat_panic_handler(void) __dead2; 165 * Endless loop by default. 166 * ----------------------------------------------------- 167 */ 168func plat_panic_handler 169 wfi 170 b plat_panic_handler 171endfunc plat_panic_handler 172 173 /* ----------------------------------------------------- 174 * void bl31_plat_enable_mmu(uint32_t flags); 175 * 176 * Enable MMU in BL31. 177 * ----------------------------------------------------- 178 */ 179func bl31_plat_enable_mmu 180 b enable_mmu_direct_el3 181endfunc bl31_plat_enable_mmu 182 183 /* ----------------------------------------------------- 184 * void bl32_plat_enable_mmu(uint32_t flags); 185 * 186 * Enable MMU in BL32. 187 * ----------------------------------------------------- 188 */ 189func bl32_plat_enable_mmu 190 b enable_mmu_direct_el1 191endfunc bl32_plat_enable_mmu 192 193 194 /* ----------------------------------------------------- 195 * Platform handler for Uncontainable External Abort. 196 * 197 * x0: EA reason 198 * x1: EA syndrome 199 * ----------------------------------------------------- 200 */ 201func plat_handle_uncontainable_ea 202 b report_unhandled_exception 203endfunc plat_handle_uncontainable_ea 204 205 /* ----------------------------------------------------- 206 * Platform handler for Double Fault. 207 * 208 * x0: EA reason 209 * x1: EA syndrome 210 * ----------------------------------------------------- 211 */ 212func plat_handle_double_fault 213 b report_unhandled_exception 214endfunc plat_handle_double_fault 215