xref: /rk3399_ARM-atf/plat/common/aarch64/platform_helpers.S (revision c96f297f8d3c83560731b86244147f5221d39475)
1/*
2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <console.h>
10#include <platform_def.h>
11
12	.weak	plat_report_exception
13	.weak	plat_crash_console_init
14	.weak	plat_crash_console_putc
15	.weak	plat_crash_console_flush
16	.weak	plat_reset_handler
17	.weak	plat_disable_acp
18	.weak	bl1_plat_prepare_exit
19	.weak	plat_panic_handler
20	.weak	bl31_plat_enable_mmu
21	.weak	bl32_plat_enable_mmu
22
23#if !ENABLE_PLAT_COMPAT
24	.globl	platform_get_core_pos
25
26#define MPIDR_RES_BIT_MASK	0xff000000
27
28	/* ------------------------------------------------------------------
29	 *  int platform_get_core_pos(int mpidr)
30	 *  Returns the CPU index of the CPU specified by mpidr. This is
31	 *  defined when platform compatibility is disabled to enable Trusted
32	 *  Firmware components like SPD using the old  platform API to work.
33	 *  This API is deprecated and it assumes that the mpidr specified is
34	 *  that of a valid and present CPU. Instead, plat_my_core_pos()
35	 *  should be used for CPU index of the current CPU and
36	 *  plat_core_pos_by_mpidr() should be used for CPU index of a
37	 *  CPU specified by its mpidr.
38	 * ------------------------------------------------------------------
39	 */
40func_deprecated platform_get_core_pos
41	bic	x0, x0, #MPIDR_RES_BIT_MASK
42	mrs	x1, mpidr_el1
43	bic	x1, x1, #MPIDR_RES_BIT_MASK
44	cmp	x0, x1
45	beq	plat_my_core_pos
46	b	platform_core_pos_helper
47endfunc_deprecated platform_get_core_pos
48#endif
49
50	/* -----------------------------------------------------
51	 * Placeholder function which should be redefined by
52	 * each platform.
53	 * -----------------------------------------------------
54	 */
55func plat_report_exception
56	ret
57endfunc plat_report_exception
58
59#if MULTI_CONSOLE_API
60	/* -----------------------------------------------------
61	 * int plat_crash_console_init(void)
62	 * Use normal console by default. Switch it to crash
63	 * mode so serial consoles become active again.
64	 * NOTE: This default implementation will only work for
65	 * crashes that occur after a normal console (marked
66	 * valid for the crash state) has been registered with
67	 * the console framework. To debug crashes that occur
68	 * earlier, the platform has to override these functions
69	 * with an implementation that initializes a console
70	 * driver with hardcoded parameters. See
71	 * docs/porting-guide.rst for more information.
72	 * -----------------------------------------------------
73	 */
74func plat_crash_console_init
75#if defined(IMAGE_BL1)
76	/*
77	 * BL1 code can possibly crash so early that the data segment is not yet
78	 * accessible. Don't risk undefined behavior by trying to run the normal
79	 * console framework. Platforms that want to debug BL1 will need to
80	 * override this with custom functions that can run from registers only.
81	 */
82	mov	x0, #0
83	ret
84#else	/* IMAGE_BL1 */
85	mov	x3, x30
86	mov	x0, #CONSOLE_FLAG_CRASH
87	bl	console_switch_state
88	mov	x0, #1
89	ret	x3
90#endif
91endfunc plat_crash_console_init
92
93	/* -----------------------------------------------------
94	 * void plat_crash_console_putc(int character)
95	 * Output through the normal console by default.
96	 * -----------------------------------------------------
97	 */
98func plat_crash_console_putc
99	b	console_putc
100endfunc plat_crash_console_putc
101
102	/* -----------------------------------------------------
103	 * void plat_crash_console_flush(void)
104	 * Flush normal console by default.
105	 * -----------------------------------------------------
106	 */
107func plat_crash_console_flush
108	b	console_flush
109endfunc plat_crash_console_flush
110
111#else	/* MULTI_CONSOLE_API */
112
113	/* -----------------------------------------------------
114	 * In the old API these are all no-op stubs that need to
115	 * be overridden by the platform to be useful.
116	 * -----------------------------------------------------
117	 */
118func plat_crash_console_init
119	mov	x0, #0
120	ret
121endfunc plat_crash_console_init
122
123func plat_crash_console_putc
124	ret
125endfunc plat_crash_console_putc
126
127func plat_crash_console_flush
128	ret
129endfunc plat_crash_console_flush
130#endif
131
132	/* -----------------------------------------------------
133	 * Placeholder function which should be redefined by
134	 * each platform. This function should preserve x19 - x29.
135	 * -----------------------------------------------------
136	 */
137func plat_reset_handler
138	ret
139endfunc plat_reset_handler
140
141	/* -----------------------------------------------------
142	 * Placeholder function which should be redefined by
143	 * each platform. This function is allowed to use
144	 * registers x0 - x17.
145	 * -----------------------------------------------------
146	 */
147func plat_disable_acp
148	ret
149endfunc plat_disable_acp
150
151	/* -----------------------------------------------------
152	 * void bl1_plat_prepare_exit(entry_point_info_t *ep_info);
153	 * Called before exiting BL1. Default: do nothing
154	 * -----------------------------------------------------
155	 */
156func bl1_plat_prepare_exit
157	ret
158endfunc bl1_plat_prepare_exit
159
160	/* -----------------------------------------------------
161	 * void plat_panic_handler(void) __dead2;
162	 * Endless loop by default.
163	 * -----------------------------------------------------
164	 */
165func plat_panic_handler
166	wfi
167	b	plat_panic_handler
168endfunc plat_panic_handler
169
170	/* -----------------------------------------------------
171	 * void bl31_plat_enable_mmu(uint32_t flags);
172	 *
173	 * Enable MMU in BL31.
174	 * -----------------------------------------------------
175	 */
176func bl31_plat_enable_mmu
177	b	enable_mmu_direct_el3
178endfunc bl31_plat_enable_mmu
179
180	/* -----------------------------------------------------
181	 * void bl32_plat_enable_mmu(uint32_t flags);
182	 *
183	 * Enable MMU in BL32.
184	 * -----------------------------------------------------
185	 */
186func bl32_plat_enable_mmu
187	b	enable_mmu_direct_el1
188endfunc bl32_plat_enable_mmu
189