1/* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <arch.h> 32#include <asm_macros.S> 33#include <platform_def.h> 34 35 36 .weak platform_get_core_pos 37 .weak platform_is_primary_cpu 38 .weak platform_check_mpidr 39 .weak plat_report_exception 40 .weak plat_crash_console_init 41 .weak plat_crash_console_putc 42 43 /* ----------------------------------------------------- 44 * int platform_get_core_pos(int mpidr); 45 * With this function: CorePos = (ClusterId * 4) + 46 * CoreId 47 * ----------------------------------------------------- 48 */ 49func platform_get_core_pos 50 and x1, x0, #MPIDR_CPU_MASK 51 and x0, x0, #MPIDR_CLUSTER_MASK 52 add x0, x1, x0, LSR #6 53 ret 54 55 /* ----------------------------------------------------- 56 * void platform_is_primary_cpu (unsigned int mpid); 57 * 58 * Given the mpidr say whether this cpu is the primary 59 * cpu (applicable ony after a cold boot) 60 * ----------------------------------------------------- 61 */ 62func platform_is_primary_cpu 63 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 64 cmp x0, #PRIMARY_CPU 65 cset x0, eq 66 ret 67 68 /* ----------------------------------------------------- 69 * Placeholder function which should be redefined by 70 * each platform. 71 * ----------------------------------------------------- 72 */ 73func platform_check_mpidr 74 mov x0, xzr 75 ret 76 77 /* ----------------------------------------------------- 78 * Placeholder function which should be redefined by 79 * each platform. 80 * ----------------------------------------------------- 81 */ 82func plat_report_exception 83 ret 84 85 /* ----------------------------------------------------- 86 * Placeholder function which should be redefined by 87 * each platform. 88 * ----------------------------------------------------- 89 */ 90func plat_crash_console_init 91 mov x0, #0 92 ret 93 94 /* ----------------------------------------------------- 95 * Placeholder function which should be redefined by 96 * each platform. 97 * ----------------------------------------------------- 98 */ 99func plat_crash_console_putc 100 ret 101