xref: /rk3399_ARM-atf/plat/common/aarch64/platform_helpers.S (revision c67b09bd2cf04cac2160968907f0a9fc65472a11)
14f6ad66aSAchin Gupta/*
2e83b0cadSDan Handley * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
34f6ad66aSAchin Gupta *
44f6ad66aSAchin Gupta * Redistribution and use in source and binary forms, with or without
54f6ad66aSAchin Gupta * modification, are permitted provided that the following conditions are met:
64f6ad66aSAchin Gupta *
74f6ad66aSAchin Gupta * Redistributions of source code must retain the above copyright notice, this
84f6ad66aSAchin Gupta * list of conditions and the following disclaimer.
94f6ad66aSAchin Gupta *
104f6ad66aSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice,
114f6ad66aSAchin Gupta * this list of conditions and the following disclaimer in the documentation
124f6ad66aSAchin Gupta * and/or other materials provided with the distribution.
134f6ad66aSAchin Gupta *
144f6ad66aSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used
154f6ad66aSAchin Gupta * to endorse or promote products derived from this software without specific
164f6ad66aSAchin Gupta * prior written permission.
174f6ad66aSAchin Gupta *
184f6ad66aSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
194f6ad66aSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
204f6ad66aSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
214f6ad66aSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
224f6ad66aSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
234f6ad66aSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
244f6ad66aSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
254f6ad66aSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
264f6ad66aSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
274f6ad66aSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
284f6ad66aSAchin Gupta * POSSIBILITY OF SUCH DAMAGE.
294f6ad66aSAchin Gupta */
304f6ad66aSAchin Gupta
314f6ad66aSAchin Gupta#include <arch.h>
320a30cf54SAndrew Thoelke#include <asm_macros.S>
335f0cdb05SDan Handley#include <platform_def.h>
344f6ad66aSAchin Gupta
354f6ad66aSAchin Gupta
364f6ad66aSAchin Gupta	.weak	platform_get_core_pos
374f6ad66aSAchin Gupta	.weak	platform_is_primary_cpu
384f6ad66aSAchin Gupta	.weak	platform_check_mpidr
394f6ad66aSAchin Gupta	.weak	plat_report_exception
40*c67b09bdSSoby Mathew	.weak	plat_crash_console_init
41*c67b09bdSSoby Mathew	.weak	plat_crash_console_putc
424f6ad66aSAchin Gupta
434f6ad66aSAchin Gupta	/* -----------------------------------------------------
444f6ad66aSAchin Gupta	 *  int platform_get_core_pos(int mpidr);
454f6ad66aSAchin Gupta	 *  With this function: CorePos = (ClusterId * 4) +
464f6ad66aSAchin Gupta	 *  				  CoreId
474f6ad66aSAchin Gupta	 * -----------------------------------------------------
484f6ad66aSAchin Gupta	 */
490a30cf54SAndrew Thoelkefunc platform_get_core_pos
504f6ad66aSAchin Gupta	and	x1, x0, #MPIDR_CPU_MASK
514f6ad66aSAchin Gupta	and	x0, x0, #MPIDR_CLUSTER_MASK
524f6ad66aSAchin Gupta	add	x0, x1, x0, LSR #6
534f6ad66aSAchin Gupta	ret
544f6ad66aSAchin Gupta
554f6ad66aSAchin Gupta	/* -----------------------------------------------------
564f6ad66aSAchin Gupta	 * void platform_is_primary_cpu (unsigned int mpid);
574f6ad66aSAchin Gupta	 *
584f6ad66aSAchin Gupta	 * Given the mpidr say whether this cpu is the primary
594f6ad66aSAchin Gupta	 * cpu (applicable ony after a cold boot)
604f6ad66aSAchin Gupta	 * -----------------------------------------------------
614f6ad66aSAchin Gupta	 */
620a30cf54SAndrew Thoelkefunc platform_is_primary_cpu
634f6ad66aSAchin Gupta	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
644f6ad66aSAchin Gupta	cmp	x0, #PRIMARY_CPU
654f6ad66aSAchin Gupta	cset	x0, eq
664f6ad66aSAchin Gupta	ret
674f6ad66aSAchin Gupta
684f6ad66aSAchin Gupta	/* -----------------------------------------------------
694f6ad66aSAchin Gupta	 * Placeholder function which should be redefined by
704f6ad66aSAchin Gupta	 * each platform.
714f6ad66aSAchin Gupta	 * -----------------------------------------------------
724f6ad66aSAchin Gupta	 */
730a30cf54SAndrew Thoelkefunc platform_check_mpidr
744f6ad66aSAchin Gupta	mov	x0, xzr
754f6ad66aSAchin Gupta	ret
764f6ad66aSAchin Gupta
774f6ad66aSAchin Gupta	/* -----------------------------------------------------
784f6ad66aSAchin Gupta	 * Placeholder function which should be redefined by
794f6ad66aSAchin Gupta	 * each platform.
804f6ad66aSAchin Gupta	 * -----------------------------------------------------
814f6ad66aSAchin Gupta	 */
820a30cf54SAndrew Thoelkefunc plat_report_exception
834f6ad66aSAchin Gupta	ret
84*c67b09bdSSoby Mathew
85*c67b09bdSSoby Mathew	/* -----------------------------------------------------
86*c67b09bdSSoby Mathew	 * Placeholder function which should be redefined by
87*c67b09bdSSoby Mathew	 * each platform.
88*c67b09bdSSoby Mathew	 * -----------------------------------------------------
89*c67b09bdSSoby Mathew	 */
90*c67b09bdSSoby Mathewfunc plat_crash_console_init
91*c67b09bdSSoby Mathew	mov	x0, #0
92*c67b09bdSSoby Mathew	ret
93*c67b09bdSSoby Mathew
94*c67b09bdSSoby Mathew	/* -----------------------------------------------------
95*c67b09bdSSoby Mathew	 * Placeholder function which should be redefined by
96*c67b09bdSSoby Mathew	 * each platform.
97*c67b09bdSSoby Mathew	 * -----------------------------------------------------
98*c67b09bdSSoby Mathew	 */
99*c67b09bdSSoby Mathewfunc plat_crash_console_putc
100*c67b09bdSSoby Mathew	ret
101