1/* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <arch.h> 32#include <asm_macros.S> 33 34 .weak plat_my_core_pos 35 .weak plat_reset_handler 36 .weak platform_mem_init 37 .weak plat_panic_handler 38 39 /* ----------------------------------------------------- 40 * int plat_my_core_pos(void); 41 * With this function: CorePos = (ClusterId * 4) + 42 * CoreId 43 * ----------------------------------------------------- 44 */ 45func plat_my_core_pos 46 ldcopr r0, MPIDR 47 and r1, r0, #MPIDR_CPU_MASK 48 and r0, r0, #MPIDR_CLUSTER_MASK 49 add r0, r1, r0, LSR #6 50 bx lr 51endfunc plat_my_core_pos 52 53 /* ----------------------------------------------------- 54 * Placeholder function which should be redefined by 55 * each platform. 56 * ----------------------------------------------------- 57 */ 58func plat_reset_handler 59 bx lr 60endfunc plat_reset_handler 61 62 /* --------------------------------------------------------------------- 63 * Placeholder function which should be redefined by 64 * each platform. 65 * --------------------------------------------------------------------- 66 */ 67func platform_mem_init 68 bx lr 69endfunc platform_mem_init 70 71 /* ----------------------------------------------------- 72 * void plat_panic_handler(void) __dead2; 73 * Endless loop by default. 74 * ----------------------------------------------------- 75 */ 76func plat_panic_handler 77 b plat_panic_handler 78endfunc plat_panic_handler 79